US4551789A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multilayer ceramic substrates with several metallization planes
Assignee: International Business Machines Corp
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Filing: 1982-12-13
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Granted: 1985-11-05
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Expires: 2002-12-13
Abstract
Abstract This invention concerns a ceramic substrate for mounting semiconductor integrated circuits. The substrates include at least a first and second patterned metallization layer which respectively form conducting planes that are parallel to each other but separated by a thickness of insulation. The pattern metallization of at least the first plane includes signal conductors for joining the contacts of the integrated circuit chip to pins provided in the substrate for connecting the substrate and chip to a circuit board. In accordance with the invention, the metallization of the second plane includes shorted conductor loops that follow the contour of the signal conductors. The shorted loops of the second plane metallization includes branches which extend parallel to both lateral sides of a respective signal conductor. In accordance with the invention, the branches of the loops are joined at their ends.
Inventors
- 👤 Helmut Schettler
- 👤 Ewald Stadler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 22:21
CPC Classifications
H; H10; H10W; H10W42/00; H10W70/00; H10W70/60; H10W70/611; H10W70/67; H10W70/68; H10W70/685; H05; H05K; H05K1/00; H05K1/02; H05K1/0213; H05K1/0216; H05K1/0296; H05K1/0298; H05K1/03; H05K1/0306
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
167 words
A ceramic substrate for mounting integrated circuit semiconductor devices, the substrate having holes therethrough with lead pins mounted therein and having at least two patterned metallization layers, wherein increased density is achieved while eliminating capacitive and inductive coupling comprising: a first metallization layer on the top surface of said substrate including a plurality of closely spaced pads provided to make contact to I/O pads on said device mounted on said substrate and a plurality of signal conductors connected to and emanating from said closely spaced pads and connected to said lead pins mounted on said substrate; a second shielding metallization layer on the top surface of said substrate comprised of a plurality of electrically interconnected first loops said first loops including metal stripe portions located laterally of said signal conductors of said first metallization layer and in conforming relationship and second interconnected loops disposed about and in spaced relation to said lead pins and a layer of insulating material disposed between said first and second metallization layers.
Claim 2
Dependent Claim
167 words
A ceramic substrate for mounting integrated circuit semiconductor devices, the substrate having holes therethrough with lead pins mounted therein and having at least two patterned metallization layers, wherein increased density is achieved while eliminating capacitive and inductive coupling comprising: a first metallization layer on the top surface of said substrate including a plurality of closely spaced pads provided to make contact to I/O pads on said device mounted on said substrate and a plurality of signal conductors connected to and emanating from said closely spaced pads and connected to said lead pins mounted on said substrate; a second shielding metallization layer on the top surface of said substrate comprised of a plurality of electrically interconnected first loops said first loops including metal stripe portions located laterally of said signal conductors of said first metallization layer and in conforming relationship and second interconnected loops disposed about and in spaced relation to said lead pins and a layer of insulating material disposed between said first and second metallization layers.
Claim 3
Dependent Claim
12 words
A substrate, as in claim 1, wherein the insulating material is polyimide.
Claim 4
Dependent Claim
17 words
A substrate, as in claim 1, wherein the first metallization layer is formed at the substrate surface.
Claim 5
Dependent Claim
17 words
A substrate, as in claim 1, wherein the second metallization layer is formed at the substrate surface.
References Cited (Backward Citations)
US3022480A
Cited
US2963535A
Cited
GB1157268A
Cited
US3564115A
Cited
US3546539A
Cited
CH469424A
Cited
US3621116A
Cited
US3818117A
Cited
DE2345572A1
Cited
US3902790A
Cited
US3939381A
Cited
US3914531A
Cited
US4353040A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-11-04 | 1989-05-06 | 1989-11-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-11-04 | 1993-05-06 | 1993-11-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-11-04 | 1997-05-06 | 1997-11-05 | $7700.00 | Window Closed / Lapsed |