Patent US3528937A successfully refreshed from Google Patents.
US4550366A
Expired / Lapsed
US
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Programmable sequence controller and system
Assignee: Shibaura Machine Co Ltd
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Filing: 1982-08-12
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Granted: 1985-10-29
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Expires: 2002-08-12
Abstract
Abstract A programmable sequence controller and a sequence control system including a plurality of such controllers. Each sequence controller includes a program memory for storing a preprogrammed sequence of instructions for controlling a machine or part of a machine in response to the status of the machine or part being controlled. Each controller includes data transfer circuitry for receiving status data from another sequence controller on a common data bus and transmitting its own status data to all of the other sequence controllers on the common data bus. Each sequence controller includes an input-output (I/O) memory and an (I/O) flag memory for storing and keeping track of current status information from each of the plurality of controllers. Thus, each controller can make a control decision based not only on input and output status data from the specific machine or machine part that it controls but also based on the status of the machines or machine parts being controlled by the other sequence controllers linked by the common data bus. The number of sequence controllers linked by the common data line can be increased as necessary to execute increasingly complex control functions.
Inventors
- 👤 Fumiyasu Toyama
- 👤 Masaaki Murakoshi
- 👤 Masanori Wakuda
- 👤 Junichi Sasaki
- 👤 Hirotoshi Watanabe
- 👤 Tomio Yukawa
- 👤 Yoshihiko Okayama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:35
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/05; G05B19/052; G05B2219/00; G05B2219/10; G05B2219/11; G05B2219/1159
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
196 words
In a programmable sequence controller (PC) for controlling a machine, including means for receiving status data from said machine, a program memory for storing a set of program instructions for controlling the machine, and means for generating a control signal for controlling the machine responsive to the program instructions set and said machine status data, and where said PC may be linked via a common data bus to other PCs which control other machines, the improvement comprising: data transfer means for transmitting said machine status data to said common data bus, and for receiving from said common data bus, the status bus of the machines associated with said PCs; and input/output (I/O) status memory means for storing said machine status data and said other status data, thereby providing said PC with the ability to generate a control signal that can be responsive to said other data , said I/O status memory means including an I/O memory for storing said machine and said other status data, and a flag memory for marking an address of said I/O memory to indicate the presence or absence of a communication occurring between any of said PCs and its associated machines.
Claim 2
Dependent Claim
196 words
In a programmable sequence controller (PC) for controlling a machine, including means for receiving status data from said machine, a program memory for storing a set of program instructions for controlling the machine, and means for generating a control signal for controlling the machine responsive to the program instructions set and said machine status data, and where said PC may be linked via a common data bus to other PCs which control other machines, the improvement comprising: data transfer means for transmitting said machine status data to said common data bus, and for receiving from said common data bus, the status bus of the machines associated with said PCs; and input/output (I/O) status memory means for storing said machine status data and said other status data, thereby providing said PC with the ability to generate a control signal that can be responsive to said other data , said I/O status memory means including an I/O memory for storing said machine and said other status data, and a flag memory for marking an address of said I/O memory to indicate the presence or absence of a communication occurring between any of said PCs and its associated machines.
Claim 3
Dependent Claim
179 words
A programmable sequence controller (PC) for controlling a machine, comprising: means for receiving status data about said machine; means for transmitting a control signal to said machine for controlling said machine; a program memory for storing a preprogrammed sequence of instructions specifying a desired control of said machine; data transfer means for transmitting said machine status data to a data bus, and for receiving from said data bus the status data of other machines associated with other PCs which are linked to said data bus; input/output (I/O) status memory means for storing said machine status data from said receiving means and said other status data from said data transfer means, said I/O status memory means including an I/O memory for storing said machine and said other status data and a flag memory for storing a marker for flagging an address of I/O memory; and means for (a) reading said sequence instructions from said program memory and said machine and said other status data from said I/O memory means and (b) generating said control signal for transmission to said machine.
Claim 4
Dependent Claim
179 words
A programmable sequence controller (PC) for controlling a machine, comprising: means for receiving status data about said machine; means for transmitting a control signal to said machine for controlling said machine; a program memory for storing a preprogrammed sequence of instructions specifying a desired control of said machine; data transfer means for transmitting said machine status data to a data bus, and for receiving from said data bus the status data of other machines associated with other PCs which are linked to said data bus; input/output (I/O) status memory means for storing said machine status data from said receiving means and said other status data from said data transfer means, said I/O status memory means including an I/O memory for storing said machine and said other status data and a flag memory for storing a marker for flagging an address of I/O memory; and means for (a) reading said sequence instructions from said program memory and said machine and said other status data from said I/O memory means and (b) generating said control signal for transmission to said machine.
Claim 5
Independent Claim
196 words
A system of programmable sequence controllers (PCs) for controlling a plurality of machine parts, respectively, comprising: a common data bus line for carrying status data related to each one of said plurality of machine parts to all of said PCs on said data bus, each one of said PCs comprising: means for receiving said status data from the machine part associated with said one PC; means for transmitting a control signal to said machine part for controlling said machine part; a program memory for storing a preprogrammed sequence of instructions specifying a desired control of said machine part; data transfer means for transmitting status data to and receiving status data from said data bus; input/output (I/O) memory means for storing status data from said receiving means and said data transfer means, said I/O memory means including an I/O status memory for storing status data and a flag memory for storing a marker for flagging an address of I/O memory; and means for (a) reading said sequence instructions from said program memory and status data from said I/O memory means and (b) generating said control signal for transmission to said machine part for controlling said machine part.
Claim 6
Independent Claim
196 words
A system of programmable sequence controllers (PCs) for controlling a plurality of machine parts, respectively, comprising: a common data bus line for carrying status data related to each one of said plurality of machine parts to all of said PCs on said data bus, each one of said PCs comprising: means for receiving said status data from the machine part associated with said one PC; means for transmitting a control signal to said machine part for controlling said machine part; a program memory for storing a preprogrammed sequence of instructions specifying a desired control of said machine part; data transfer means for transmitting status data to and receiving status data from said data bus; input/output (I/O) memory means for storing status data from said receiving means and said data transfer means, said I/O memory means including an I/O status memory for storing status data and a flag memory for storing a marker for flagging an address of I/O memory; and means for (a) reading said sequence instructions from said program memory and status data from said I/O memory means and (b) generating said control signal for transmission to said machine part for controlling said machine part.
Claim 7
Dependent Claim
217 words
A programmable sequence controller (PC) which may be linked to other PCs via a common data bus, comprising: I/O data control means, adapted for coupling to input/output elements of a controlled object, for transmitting/receiving I/O data; I/O data memory means coupled to said I/O data control means for storing said I/O data; program memory means for storing a sequence program which controls said controlled object; calculating means, connected to said program memory means, for effecting arithmetic calculations in accordance with said sequence program; control means for applying control signals to said I/O data control means, I/O data memory means, program memory means and calculating means; I/O data transfer means connected to said I/O data memory means and said common data bus for transferring said I/O data to any other PC on said common data bus and receiving from any other PC I/O data which that PC transfers to/from its associated controlled object; I/O flag memory means, coupled to said I/O data transfer means and said I/O data memory means and said calculating means, for storing I/O flags in specific memory locations corresponding to the identities of said other PCs connected to said common data bus, each of said flags indicating that a particular one of said other PCs is transferring I/O data to/from its associated controlled object.
Claim 8
Dependent Claim
217 words
A programmable sequence controller (PC) which may be linked to other PCs via a common data bus, comprising: I/O data control means, adapted for coupling to input/output elements of a controlled object, for transmitting/receiving I/O data; I/O data memory means coupled to said I/O data control means for storing said I/O data; program memory means for storing a sequence program which controls said controlled object; calculating means, connected to said program memory means, for effecting arithmetic calculations in accordance with said sequence program; control means for applying control signals to said I/O data control means, I/O data memory means, program memory means and calculating means; I/O data transfer means connected to said I/O data memory means and said common data bus for transferring said I/O data to any other PC on said common data bus and receiving from any other PC I/O data which that PC transfers to/from its associated controlled object; I/O flag memory means, coupled to said I/O data transfer means and said I/O data memory means and said calculating means, for storing I/O flags in specific memory locations corresponding to the identities of said other PCs connected to said common data bus, each of said flags indicating that a particular one of said other PCs is transferring I/O data to/from its associated controlled object.
Claim 9
Dependent Claim
35 words
A programmable sequence controller as in claim 4, wherein said I/O data memory means and said I/O flag memory means have corresponding memory areas respectively, in symmetric and parallel connection with respect to each other.
Claim 10
Dependent Claim
97 words
A programmable sequence controller as in claim 4, wherein said I/O data transfer means includes a decimal counter and an address counter, said decimal counter producing a writing pulse to said I/O data memory means and an adding pulse to said address counter when said I/O flag memory means indicates that none of the PCs connected to the common data bus is currently transferring I/O data to/from its associated controlled object, said address counter producing an address command signal to said I/O data memory means and to said I/O flag memory means upon detecting said adding pulse.
Claim 11
Dependent Claim
177 words
A sequence control system having a plurality of programmable sequence controllers, each of said controllers comprising: I/O data control means adapted for coupling to input and output elements of a control object for transmitting/receiving I/O data; I/O data memory means coupled to said I/O data control means for storing said I/O data; program memory means for storing a sequence program defining a desired control of said control object; calculating means for arithmetic calculation in accordance with said sequence program; control means for applying control signals to said I/O data control means, I/O data memory means, program memory means and calculating means; I/O flag memory means for storing an I/O flag in areas corresponding to an address of I/O data outputted in accordance with each sequence program in the other ones of said plurality of sequence controllers connected eans connected to said I/O data memory means and said I/O flag memory means for transferring said I/O data to any other of said plurality of sequence controllers, ranssaid I/O data transfer means being connected to one data bus line.
Claim 12
Dependent Claim
177 words
A sequence control system having a plurality of programmable sequence controllers, each of said controllers comprising: I/O data control means adapted for coupling to input and output elements of a control object for transmitting/receiving I/O data; I/O data memory means coupled to said I/O data control means for storing said I/O data; program memory means for storing a sequence program defining a desired control of said control object; calculating means for arithmetic calculation in accordance with said sequence program; control means for applying control signals to said I/O data control means, I/O data memory means, program memory means and calculating means; I/O flag memory means for storing an I/O flag in areas corresponding to an address of I/O data outputted in accordance with each sequence program in the other ones of said plurality of sequence controllers connected eans connected to said I/O data memory means and said I/O flag memory means for transferring said I/O data to any other of said plurality of sequence controllers, ranssaid I/O data transfer means being connected to one data bus line.
Claim 13
Dependent Claim
26 words
A sequence control system as in claim 7, wherein each of said program memory means is connected to a program loader through a program bus line.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-10-28 | 1989-04-29 | 1989-10-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-10-28 | 1993-04-29 | 1993-10-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-10-28 | 1997-04-29 | 1997-10-29 | $7700.00 | Window Closed / Lapsed |