US4549167A
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Method of encoding and decoding binary data
Assignee: Panasonic Holdings Corp
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Filing: 1984-03-02
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Granted: 1985-10-22
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Expires: 2004-03-02
Abstract
Abstract A method of encoding and decoding binary data, comprising the steps of: dividing the binary data into 2-bit data groups, converting each 2-bit data group into a 5-bit code having a minimum of 4 consecutive bits "0" between a bit "1" and the next bit "1", and converting reversely the encoded 5-bit codes into the original binary data with reference to another 5-bit codes located forwardly of and rearwardly of the 5-bit code. By employing this method, it becomes possible to obtain a density twice higher than that of "MFM" method.
Inventors
- 👤 Misao Kato
- 👤 Yasuharu Shimeki
- 👤 Hiroshi Matsushima
- 👤 Kousou Takeuchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 17:26
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
103 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits.
Claim 2
Independent Claim
103 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits.
Claim 3
Dependent Claim
45 words
A method as claimed in claim 1, wherein the 5-bit conversion codes are divided into a first conversion code group and a second conversion code group, the first conversion code group consisting of 4 kinds of conversion codes corresponding in principle, to the original data.
Claim 4
Dependent Claim
26 words
A method as claimed in claim 1, wherein the bit in the first state and the bit in the second state are "1" and "0", respectively.
Claim 5
Dependent Claim
22 words
A method as claimed in claim 3, wherein the 5-bit conversion codes are "Y0000" (Y=0 or 1), "00001", "00010", "00100" and "01000".
Claim 6
Dependent Claim
34 words
A method as claimed in claim 2, wherein the first conversion code group consists of "Y0000" (Y=0 or 1), "00001", "00010" and "00100", while the second conversion code group consists of "Y0000" and "01000".
Claim 7
Dependent Claim
53 words
A method as claimed in claim 1, wherein the number of the bits in the second state occurring consecutively between the bit in the first state and the next bit in the first state in the conversion code sequence is set at a minimum of 4 and a maximum of a predetermined value.
Claim 8
Dependent Claim
13 words
A method as claimed in claim 6, wherein the predetermined value is 22.
Claim 9
Dependent Claim
70 words
A method as claimed in claim 7, wherein each original datum is arranged to correspond to at least one of the conversion codes and is encoded through selection of one of first and second conversion code groups based on linkage conditions of another original data located forwardly of and rearwardly of said original datum and linkage conditions of another conversion code located forwardly of said one of the conversion codes.
Claim 10
Dependent Claim
51 words
A method as claimed in claim 7, wherein each conversion code is arranged to correspond to at least one of the original data and is decoded through selection of one of the original data based on linkage conditions of another conversion codes located forwardly of and rearwardly of said conversion code.
Claim 11
Dependent Claim
13 words
A method as claimed in claim 6, wherein the predetermined value is 19.
Claim 12
Dependent Claim
54 words
A method as claimed in claim 10, wherein each original datum is arranged to correspond to at least one of the conversion codes and is encoded through selection of one of first and second conversion code groups based on linkage conditions of another original data located forwardly of and rearwardly of said original datum.
Claim 13
Dependent Claim
67 words
A method as claimed in claim 10, wherein each conversion code is arranged to correspond to at least one of the original data and is decoded through selection of one of the original data based on linkage conditions of another conversion codes located forwardly of and rearwardly of said conversion code and linkage conditions of another original datum located forwardly of said one of the original data.
Claim 14
Dependent Claim
38 words
A method as claimed in claim 1, wherein a plurality of the conversion codes are gathered into a frame and a synchronous signal of a predetermined number of bits is added to a front end of the frame.
Claim 15
Dependent Claim
28 words
A method as claimed in claim 13, wherein a bit pattern which is by no means generated in the conversion code sequence is used as the synchronous signal.
Claim 16
Dependent Claim
23 words
A method as claimed in claim 13, wherein the synchronous signal is constituted by a bit pattern of the second conversion code group.
Claim 17
Dependent Claim
26 words
A method as claimed in claim 15, wherein the synchronous signal is constituted by 4 or more conversion codes contained in the second conversion code group.
Claim 18
Dependent Claim
30 words
A method as claimed in claim 13, wherein the synchronous signal is constituted by a pattern in which "Y000000000" (Y=0 or 1) is followed by 3 or more consecutive "01000"s.
Claim 19
Dependent Claim
30 words
A method as claimed in claim 13, wherein the synchronous signal is constituted by a pattern in which "Y00000000000000" (Y=0 or 1) is followed by 2 or more consecutive "01000"s.
Claim 20
Dependent Claim
45 words
A method as claimed in claim 1, which is used for recording or reproducing the binary data on a recording medium in series of bits, or in a recording and reproducing apparatus therefor, or for transmitting the binary data or in a transmitting apparatus therefor.
Claim 21
Independent Claim
251 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits; the number of the bits in the second state occurring consecutively between the bit in the first state and the next bit in the first state in the conversion code sequence being set at a minimum of 4 and a maximum of 22, each original datum being arranged to correspond to at least one of the conversion codes and being encoded through selection of one of first and second conversion code groups based on linkage conditions of another original data located forwardly of and rearwardly of said original datum and linkage conditions of another conversion code located forwardly of said one of the conversion codes, each conversion code being arranged to correspond to at least one of the original data and being decoded through selection of one of the original data based on linkage conditions of another conversion codes located forwardly of and rearwardly of said conversion code.
Claim 22
Independent Claim
251 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits; the number of the bits in the second state occurring consecutively between the bit in the first state and the next bit in the first state in the conversion code sequence being set at a minimum of 4 and a maximum of 22, each original datum being arranged to correspond to at least one of the conversion codes and being encoded through selection of one of first and second conversion code groups based on linkage conditions of another original data located forwardly of and rearwardly of said original datum and linkage conditions of another conversion code located forwardly of said one of the conversion codes, each conversion code being arranged to correspond to at least one of the original data and being decoded through selection of one of the original data based on linkage conditions of another conversion codes located forwardly of and rearwardly of said conversion code.
Claim 23
Dependent Claim
124 words
A method as claimed in claim 20, wherein the encoding steps further include: converting each of the binary data into a parallel signal by inputting the binary data to a 12-bit serial/parallel shift register; converting the parallel signal into a 5-bit parallel signal by an encoder; converting the 5-bit parallel signal into a serial signal by a 5-bit shift register; generating a conversion condition signal in a condition deciding circuit by the use of the serial signal; and applying the conversion condition signal to the encoder; the decoding steps further including; converting the conversion code sequence into a parallel signal by inputting the conversion code sequence to a 30-bit serial/parallel shift register; and converting the parallel signal into a 2-bit datum by a decoder.
Claim 24
Independent Claim
251 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits; the number of the bits in the second state occurring consecutively between the bit in the first state and the next bit in the first state in the conversion code sequence being set at a minimum of 4 and a maximum of 19, each original datum being arranged to correspond to at least one of the conversion codes and being encoded through selection of one of first and second conversion code groups based on linkage conditions of another original data located forwardly of and rearwardly of said original datum, each conversion code being arranged to correspond to at least one of the original data and being decoded through selection of one of the original data based on linkage conditions of another conversion codes located forwardly of and rearwardly of said conversion code and linkage conditions of another original datum located forwardly of said one of the original data.
Claim 25
Independent Claim
251 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits; the number of the bits in the second state occurring consecutively between the bit in the first state and the next bit in the first state in the conversion code sequence being set at a minimum of 4 and a maximum of 19, each original datum being arranged to correspond to at least one of the conversion codes and being encoded through selection of one of first and second conversion code groups based on linkage conditions of another original data located forwardly of and rearwardly of said original datum, each conversion code being arranged to correspond to at least one of the original data and being decoded through selection of one of the original data based on linkage conditions of another conversion codes located forwardly of and rearwardly of said conversion code and linkage conditions of another original datum located forwardly of said one of the original data.
Claim 26
Dependent Claim
120 words
A method as claimed in claim 22, wherein the encoding steps further include: converting each of the binary data into a parallel signal by inputting the binary data to a 10-bit serial/parallel shift register; converting the parallel signal into a 5-bit parallel signal by an encoder; and converting the 5-bit parallel signal into a serial signal by a 5-bit shift register; the decoding steps further including: converting the conversion code sequence into the parallel signal by a 29-bit serial/parallel shift register; and converting the parallel signal into a 2-bit datum by a decoder which accepts the parallel signal, a signal for discriminating whether an odd number of or an even number of "01000"s occur consecutively, and a 2-bit output signal.
Claim 27
Independent Claim
171 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits; a plurality of the conversion codes being gathered into a frame such that a synchronous signal is added to the frame, the frame being constituted by a pattern of "Y000000000" followed by three consecutive "01000"s or a pattern of "Y00000000000000" followed by two or more consecutive "01000"s when the bit in the first state and the bit in the second state are designated as "1" and "0", respectively.
Claim 28
Independent Claim
171 words
A method of encoding and decoding binary data, comprising encoding steps and decoding steps, the encoding steps including: dividing the binary data into 2-bit data groups each acting as an original datum; converting each original datum into a 5-bit code acting as a conversion code; and modulating the conversion codes such that a bit in a first state and a bit in a second state correspond to transition and non-transition, respectively; the decoding steps including: demodulating the modulated conversion codes into a conversion code sequence; and converting reversely the conversion code sequence into a 2-bit original data sequence at intervals of 5 bits; a plurality of the conversion codes being gathered into a frame such that a synchronous signal is added to the frame, the frame being constituted by a pattern of "Y000000000" followed by three consecutive "01000"s or a pattern of "Y00000000000000" followed by two or more consecutive "01000"s when the bit in the first state and the bit in the second state are designated as "1" and "0", respectively.
References Cited (Backward Citations)
US4496934A
Cited
US4502036A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-10-21 | 1989-04-22 | 1989-10-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-10-21 | 1993-04-22 | 1993-10-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-10-21 | 1997-04-22 | 1997-10-22 | $7700.00 | Window Closed / Lapsed |