Recursive adaptive equalizer for SMSK data links

Claim 2

A recursive adaptive equalizer for SMSK data links comprising: a plurality of feedback loops each including at least one bit of delay and each adjustable in weight and polarity; a plurality of feedforward loops each including at least one bit of delay and each adjustable in weight and polarity; said plurality of feedback loops and said plurality of feedforward loops being coupled in series between an input and an output of the equalizer; a controller coupled to the feedback and feedforward loops for supplying weight and polarity adjusting signals to said feedback and feedforward loops and further coupled to receive a final output signal from said feedback and feedforward loops; and an intersymbol interference measurement circuit coupled to said controller for reducing the amount of intersymbol interference present in the final output signal, said intersymbol interference measurement circuit including an amplifier with an automatic gain control circuit coupled to receive the final output signal, a full wave rectifier coupled to the amplifier to full wave rectify output signals therefrom, a sampling circuit coupled to receive the full wave rectified output signal and provide periodic samples thereof, and circuitry coupled to said sampling circuit to receive the periodic samples and provide output signals to said controller.

Claim 3

A recursive adaptive equalizer as claimed in claim 1 wherein the circuitry coupled to said sampling circuit includes a second full wave rectifier coupled to full wave rectify the periodic samples from the sampling circuit, the output signal therefrom having an average valaue which is a measure of the amount of intersymbol interference in a received SMSK signal.

Claim 4

A recursive adaptive equalizer as claimed in claim 2 wherein the controller includes circuitry for periodically providing dithering signals in the weight and polarity adjusting signals supplied to each feedback and feedforward loop.

Claim 5

A recursive adaptive equalizer as claimed in claim 3 wherein the circuitry coupled to said sampling circuit further includes a bandpass filter approximately centered on the frequency of the dithering signal from the controller, said bandpass filter being coupled to the second full wave rectifier to filter the full wave rectified periodic samples therefrom, synchronous detecting means coupled to the bandpass filter and to receive the dithering signals from the controller for synchronously detecting the filtered periodic samples, and comparator means coupled to the synchronous detecting means for converting the detected samples to positive and negative signals indicative of a change in intersymbol interference produced by a change in a specified weight and polarity adjusting signal.

Claim 6

A recursive adaptive equalizer for SMSK data links comprising: a first summation circuit having a plurality of inputs, one of which operates as the equalizer input, and an output; a first one bit delay having an input connected to the output of said first summation circuit and an output; a first weighting device having an input connected to the output of said first one bit delay, an output connected to an input of said first summation circuit, and a weight input; a second summation circuit having a plurality of inputs and an output which operates as the equalizer output; a second one bit delay having an output connected to one input of said second summation circuit and an input coupled to the output of said first one bit delay; and a second weighting device having an input connected to the input of said second one bit delay, an output connected to an input of said second summation circuit, and a weight input; a controller coupled to the weight inputs of said first and second weighting devices for supplying weight and polarity adjusting signals to said weighting devices and further coupled to receive a final output signal from said weighting devices; and an intersymbol interference measurement circuit coupled to said controller for reducing the amount of intersymbol interference present in the final output signal, said intersymbol interference measurement circuit including an amplifier with an automatic gain control circuit coupled to receive the final output signal, a full wave rectifier coupled to the amplifier to full wave rectify output signals therefrom, a sampling circuit coupled to receive the full wave rectified output signal and provide periodic samples thereof, and circuitry coupled to said sampling circuit to receive the periodic samples and provide output signals to said controller.

Claim 7

A recursive adaptive equalizer for SMSK data links comprising: a first summation circuit having a plurality of inputs, one of which operates as the equalizer input, and an output; a first one bit delay having an input connected to the output of said first summation circuit and an output; a first weighting device having an input connected to the output of said first one bit delay, an output connected to an input of said first summation circuit, and a weight input; a second summation circuit having a plurality of inputs and an output which operates as the equalizer output; a second one bit delay having an output connected to one input of said second summation circuit and an input coupled to the output of said first one bit delay; and a second weighting device having an input connected to the input of said second one bit delay, an output connected to an input of said second summation circuit, and a weight input; a controller coupled to the weight inputs of said first and second weighting devices for supplying weight and polarity adjusting signals to said weighting devices and further coupled to receive a final output signal from said weighting devices; and an intersymbol interference measurement circuit coupled to said controller for reducing the amount of intersymbol interference present in the final output signal, said intersymbol interference measurement circuit including an amplifier with an automatic gain control circuit coupled to receive the final output signal, a full wave rectifier coupled to the amplifier to full wave rectify output signals therefrom, a sampling circuit coupled to receive the full wave rectified output signal and provide periodic samples thereof, and circuitry coupled to said sampling circuit to receive the periodic samples and provide output signals to said controller.

Claim 8

A recursive adaptive equalizer as claimed in claim 5 wherein the first one bit delay output is coupled to the second one bit delay input by a third one bit delay and the equalizer further includes third, fourth and fifth weighting devices each having a weight input connected to receive third, fourth and fifth weight and polarity adjusting signals, said third device having an input connected to the output of said second one bit delay and an output connected to an input of the first summation circuit, said fourth device having an input connected to the output of said first one bit delay and an output connected to an input of the second summation circuit, and said fifth device having an input connected to the output of said third one bit delay and an output connected to an input of said first summation circuit.

Claim 9

A recursive adaptive equalizer as claimed in claim 5 wherein the weight and polarity adjusting signals are provided by a microprocessor.

Claim 10

A recursive adaptive equalizer as claimed in claim 7 including in addition an intersymbol interference measurement circuit coupled to the microprocessor for periodic adjustment of each of the weight and polarity adjusting signals.

Claim 11

A recursive adaptive equalizer as claimed in claim 5 wherein each of the weighting devices includes a multiplier.

Claim 12

A recursive adaptive equalizer for SMSK data links comprising: a summation circuit having a plurality of inputs and an output; a first one bit delay having an input coupled to an input of the equalizer and an output coupled to an input of said summation circuit; a first weighting device having an input coupled to the input of said first one bit delay, an output connected to an input of said summation device, and a weight input; a second one bit delay having an input coupled to the output of said summation circuit and an output; a second weighting device having an input coupled to the output of said second one bit delay, an output connected to an input of said summation device, and a weight input; a controller coupled to the weight inputs of said first and second weighting devices for supplying weight and polarity adjusting signals to said weighting devices and further coupled to receive a final output signal from said weighting devices; and an intersymbol interference measurement circuit coupled to said controller for reducing the amount of intersymbol interference present in the final output signal, said intersymbol interference measurement circuit including an amplifier with an automatic gain control circuit coupled to receive the final output signal, a full wave rectifier coupled to the amplifier to full wave rectify output signals therefrom, a sampling circuit coupled to receive the full wave rectified output signal and provide periodic samples thereof, and circuitry coupled to said sampling circuit to receive the periodic samples and provide output signals to said controller.

Claim 13

A recursive adaptive equalizer for SMSK data links comprising: a summation circuit having a plurality of inputs and an output; a first one bit delay having an input coupled to an input of the equalizer and an output coupled to an input of said summation circuit; a first weighting device having an input coupled to the input of said first one bit delay, an output connected to an input of said summation device, and a weight input; a second one bit delay having an input coupled to the output of said summation circuit and an output; a second weighting device having an input coupled to the output of said second one bit delay, an output connected to an input of said summation device, and a weight input; a controller coupled to the weight inputs of said first and second weighting devices for supplying weight and polarity adjusting signals to said weighting devices and further coupled to receive a final output signal from said weighting devices; and an intersymbol interference measurement circuit coupled to said controller for reducing the amount of intersymbol interference present in the final output signal, said intersymbol interference measurement circuit including an amplifier with an automatic gain control circuit coupled to receive the final output signal, a full wave rectifier coupled to the amplifier to full wave rectify output signals therefrom, a sampling circuit coupled to receive the full wave rectified output signal and provide periodic samples thereof, and circuitry coupled to said sampling circuit to receive the periodic samples and provide output signals to said controller.

Claim 16

A method as claimed in claim 11 wherein the steps of determining and adjusting are performed on each portion periodically to determine the effect of adjusting each portion separately.