US4547887A
Expired / Lapsed
US
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Pseudo-random convolutional interleaving
Assignee: United States Department of the Army
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Filing: 1983-11-30
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Granted: 1985-10-15
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Expires: 2003-11-30
Abstract
Abstract A method and apparatus for interleaving and deinterleaving psuedo-randomly a digital signal which is transmitted over a transmission channel is disclosed. A received bit stream is interleaved such that the order of the bits is varied in a non-random manner. The order of the interleaved bits is permutated in a pseudo-random manner and the bits are then transmitted over a transmission channel. The received bits are inverse permuted so as to return the order of the received bits to the order of the bits after the non-random interleaving step. The inverse permuted bits are then deinterleaved in the reverse order in which they were interleaved so as to reconstitute the original bit stream.
Inventors
- 👤 Shou Y. Mui
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 18:15
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/27; H03M13/2742; H03M13/2732
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
107 words
A method for interleaving and deinterleaving a digital signal transmitted over a transmission channel, said method comprising the steps of: receiving a stream of bits; interleaving the order of said bits in a non-random manner; permuting the order of said interleaved bits in a pseudo-random manner; transmitting said permuted, interleaved bits over a transmission channel; receiving said transmitted bits; inverse permuting said received bits so as to return the order of said received bits to the order of said bits after said interleaving step; and thereafter deinterleaving said bits in the reverse order in which they were interleaved so as to reconstitute the original said bit stream.
Claim 2
Independent Claim
107 words
A method for interleaving and deinterleaving a digital signal transmitted over a transmission channel, said method comprising the steps of: receiving a stream of bits; interleaving the order of said bits in a non-random manner; permuting the order of said interleaved bits in a pseudo-random manner; transmitting said permuted, interleaved bits over a transmission channel; receiving said transmitted bits; inverse permuting said received bits so as to return the order of said received bits to the order of said bits after said interleaving step; and thereafter deinterleaving said bits in the reverse order in which they were interleaved so as to reconstitute the original said bit stream.
Claim 3
Dependent Claim
15 words
The method of claim 1, wherein said stream of bits is a continuous bit stream.
Claim 4
Dependent Claim
44 words
The method of claim 1, wherein said permutation step comprises the steps of: dividing said interleaved bits into a plurality of data blocks; and for each individual data block, rearranging the order of the bits in that said data block in a pseudo-random manner.
Claim 5
Dependent Claim
14 words
The method of claim 3, wherein each said data block is of equal length.
Claim 6
Dependent Claim
19 words
The method of claim 3, wherein the length of each said data block is varied in a pseudo-random manner.
Claim 7
Dependent Claim
16 words
The method of claim 1, wherein said interleaving step is carried out using a convolutional interleaver.
Claim 8
Dependent Claim
58 words
Apparatus for interleaving a digital signal to be transmitted over a transmission channel, said apparatus comprising: an interleaver for interleaving the order of the stream of bits in a non-random manner; a permutator for permuting the order of said interleaved bits in a pseudo-random manner; and a transmitter for transmitting said permuted, interleaved bits over a transmission channel.
Claim 9
Dependent Claim
58 words
Apparatus for interleaving a digital signal to be transmitted over a transmission channel, said apparatus comprising: an interleaver for interleaving the order of the stream of bits in a non-random manner; a permutator for permuting the order of said interleaved bits in a pseudo-random manner; and a transmitter for transmitting said permuted, interleaved bits over a transmission channel.
Claim 10
Dependent Claim
40 words
The apparatus of claim 7, wherein said permutator comprising: means for dividing said interleaved bits into a plurality of data blocks; and means for rearranging the order of the bits in each respective said data block in a pseudo-random manner.
Claim 11
Dependent Claim
14 words
The apparatus of claim 8, wherein each said data block is of equal length.
Claim 12
Dependent Claim
19 words
The apparatus of claim 8, wherein the length of each said data block is varied in a pseudo-random manner.
Claim 13
Dependent Claim
238 words
Apparatus, comprising: (a) a transmitter including: (1) an interleaver having an input and an output, the input of said interleaver receiving a stream of bits, said interleaver interleaving the order of said bits in a non-random manner and applying said interleaved bits to the output of said interleaver; (2) a permutator having an input and an output, the input of said permutator being coupled to the output of said interleaver, said permutator permuting the order of said interleaved bits in a pseudo-random manner and applying said interleaved, permuted bits to said output thereof, said output being connected to a transmission channel; and (b) a receiver, including: (1) an inverse permutator having an input and an output, the input of said inverse permutator being connected to said transmission channel and receiving said transmitted bits, said inverse permutator permuting said received bits so as to return the order of said received bits to the order of said bits after they have been interleaved by said interleaver, said inverse permuted bits being applied to the output of said inverse permutator; and (2) a deinterleaver having an input and an output, the input of said deinterleaver being connected to the output of said inverse permutator, said deinterleaver deinterleaving said bits in the reverse order in which they were interleaved by said interleaver so as to reconstitute the original said bit stream, said deinterleaver applying said reconstituted bit stream to the output thereof.
Claim 14
Dependent Claim
238 words
Apparatus, comprising: (a) a transmitter including: (1) an interleaver having an input and an output, the input of said interleaver receiving a stream of bits, said interleaver interleaving the order of said bits in a non-random manner and applying said interleaved bits to the output of said interleaver; (2) a permutator having an input and an output, the input of said permutator being coupled to the output of said interleaver, said permutator permuting the order of said interleaved bits in a pseudo-random manner and applying said interleaved, permuted bits to said output thereof, said output being connected to a transmission channel; and (b) a receiver, including: (1) an inverse permutator having an input and an output, the input of said inverse permutator being connected to said transmission channel and receiving said transmitted bits, said inverse permutator permuting said received bits so as to return the order of said received bits to the order of said bits after they have been interleaved by said interleaver, said inverse permuted bits being applied to the output of said inverse permutator; and (2) a deinterleaver having an input and an output, the input of said deinterleaver being connected to the output of said inverse permutator, said deinterleaver deinterleaving said bits in the reverse order in which they were interleaved by said interleaver so as to reconstitute the original said bit stream, said deinterleaver applying said reconstituted bit stream to the output thereof.
Claim 15
Dependent Claim
40 words
The apparatus of claim 11, wherein said permutator comprises: means for dividing said interleaved bits into a plurality of data blocks; and means for rearranging the order of the bits in each respective said data block in a pseudo-random manner.
Claim 16
Dependent Claim
14 words
The apparatus of claim 12, wherein each said data block is of equal length.
Claim 17
Dependent Claim
19 words
The apparatus of claim 12, wherein the length of each said data block is varied in a pseudo-random manner.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-10-14 | 1989-04-15 | 1989-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-10-14 | 1993-04-15 | 1993-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-10-14 | 1997-04-15 | 1997-10-15 | $7700.00 | Window Closed / Lapsed |