US4545036A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sense amplifier with time dependent sensitivity
Assignee: STMicroelectronics lnc USA
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Filing: 1983-10-14
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Granted: 1985-10-01
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Expires: 2003-10-14
Abstract
Abstract A dynamic RAM integrated circuit has improved resistance to soft errors caused by alpha particles by changing the trip-point voltage of the sense amplifier from a first value that provides resistance to bit line errors to a second, lower value that provides resistance to cell errors.
Inventors
- 👤 Dennis L. Segers
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 23:35
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/409; G11C11/4091; G11C5/00; G11C5/005
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
124 words
An integrated circuit memory comprising: a plurality of memory cells; and a sense amplifier having first and second inputs, at least one of which is connectable through a bit line to at least one of said plurality of memory cells, for producing an output dependent on an input voltage difference between a cell voltage on that one of said first and second inputs connected to a selected memory cell and a reference trip-point voltage on the other of said first and second inputs; characterized in that: said reference trip-point voltage is controlled by time-dependent voltage control means to change over a predetermined time period from a first reference trip-point voltage after equilibration of said first and second inputs to a second reference trip-point voltage.
Claim 2
Dependent Claim
124 words
An integrated circuit memory comprising: a plurality of memory cells; and a sense amplifier having first and second inputs, at least one of which is connectable through a bit line to at least one of said plurality of memory cells, for producing an output dependent on an input voltage difference between a cell voltage on that one of said first and second inputs connected to a selected memory cell and a reference trip-point voltage on the other of said first and second inputs; characterized in that: said reference trip-point voltage is controlled by time-dependent voltage control means to change over a predetermined time period from a first reference trip-point voltage after equilibration of said first and second inputs to a second reference trip-point voltage.
Claim 3
Dependent Claim
39 words
An integrated circuit according to claim 1, in which said first reference trip-point voltage is substantially midway between ground and a supply voltage and said second reference trip-point voltage is closer to ground than said first reference trip-point voltage.
Claim 4
Dependent Claim
57 words
An integrated circuit according to claim 2, in which both of said first and second inputs are connectable through at least first and second bit lines to predetermined memory cells, one of said first and second bit lines carrying said cell voltage and the other of said first and second bit lines carrying said reference trip-point voltage.
Claim 5
Dependent Claim
52 words
An integrated circuit according to claim 2, in which said reference trip-point voltage is supplied by a dummy memory cell connected to said other of said first and second inputs, said dummy memory cell further comprising a dummy capacitor and means for charging said dummy capacitor to a predetermined dummy reference voltage.
References Cited (Backward Citations)
US4439804A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-09-30 | 1989-04-01 | 1989-10-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-09-30 | 1993-04-01 | 1993-10-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-09-30 | 1997-04-01 | 1997-10-01 | $7700.00 | Window Closed / Lapsed |