US4542402A
Expired / Lapsed
US
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Digital color matrix for a digital television receiver
Assignee: RCA Licensing Corp
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Filing: 1983-06-07
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Granted: 1985-09-17
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Expires: 2003-06-07
Abstract
Abstract In a digital television receiver, a digital signal processing system generates samples of binary coded color mixture digital signals that are a representation of color picture information. The values of binary coded coefficients that convert the representation of the color picture information into binary coded color difference signals are stored in a memory accessed by a microprocessor. In response to adjustment of controls such as contrast and tint, the microprocessor modifies the coefficients. The modified coefficients are placed in a digital store such as a latch arrangement. A multiplier arrangement receives samples of the color mixture digital signals as first inputs for multiplying them by corresponding modified coefficients that are supplied by the digital store as second inputs. A clock signal is generated that sequentially clocks out of the digital store selected ones of the modified coefficients for developing a sequence of products corresponding to the color mixture components of the color difference signal. The products are then combined to form samples of the binary coded color difference signal.
Inventors
- 👤 Joseph R. Ader
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 18:32
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/64; H04N9/67
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
193 words
A digital color matrix for a digital television receiver, comprising: means for generating samples of binary coded color mixture digital signals that are a representation of color picture information; means for generating values of binary coded coefficients that convert the representation of said color picture information from color mixture signals into binary coded color difference signals; means for storing said binary coded coefficients; a multiplier arrangement receiving samples of said binary coded color mixture digital signals as first inputs for multiplying samples thereof by corresponding binary coded coefficients that are supplied by said storing means as second inputs, wherein the multiplication process is capable of being performed in a pipeline operation such that a next subsequent multiplication is started before a given multiplication is completed; means for sequentially clocking out of said storing means selected ones of said binary coded coefficients at short enough intervals to permit pipelining of the multiplication process for developing a plurality of products corresponding to the color mixture components of said binary coded color difference signals; and means responsive to said plurality of products for combining the products to form samples of said binary coded color difference signals.
Claim 2
Dependent Claim
193 words
A digital color matrix for a digital television receiver, comprising: means for generating samples of binary coded color mixture digital signals that are a representation of color picture information; means for generating values of binary coded coefficients that convert the representation of said color picture information from color mixture signals into binary coded color difference signals; means for storing said binary coded coefficients; a multiplier arrangement receiving samples of said binary coded color mixture digital signals as first inputs for multiplying samples thereof by corresponding binary coded coefficients that are supplied by said storing means as second inputs, wherein the multiplication process is capable of being performed in a pipeline operation such that a next subsequent multiplication is started before a given multiplication is completed; means for sequentially clocking out of said storing means selected ones of said binary coded coefficients at short enough intervals to permit pipelining of the multiplication process for developing a plurality of products corresponding to the color mixture components of said binary coded color difference signals; and means responsive to said plurality of products for combining the products to form samples of said binary coded color difference signals.
Claim 3
Dependent Claim
20 words
A color matrix according to claim 1 wherein said multiplier arrangement is designed in the form of an adder array.
Claim 4
Dependent Claim
83 words
A color matrix according to claim 1 wherein said clocking out means comprises means for generating color mixture clock signals that are in synchronous relationship with the color mixture phase points of the color burst reference signal associated therewith and means for generating a plurality of clock signals phase shifted from said color mixture clock signals to sequentially clock out of said storing means the selected ones of said binary coded coefficients of modified value associated with said plurality of phase shifted clocks.
Claim 5
Dependent Claim
30 words
A color matrix according to claim 3 wherein said combining means includes a plurality of output latches and means for sequentially entering therein the products developed by said multiplier arrangement.
Claim 6
Dependent Claim
37 words
A color matrix according to claim 4 wherein said combining means further includes a plurality of adders for summing the products stored in said output latches to form said samples of said binary coded color difference signals.
Claim 7
Dependent Claim
31 words
A color matrix according to claim 5 wherein said coefficient generating means includes means responsive to an adjustment control for producing said binary coded coefficients with values modified in accordance therewith.
Claim 8
Dependent Claim
33 words
A color matrix according to claim 1 wherein said coefficient generating means includes means responsive to an adjustment control for producing said binary coded coefficients with values modified in accordance with the adjustment.
Claim 9
Dependent Claim
35 words
A color matrix according to claim 7 wherein said storing means includes a plurality of input latches for receiving said binary coded coefficients of modified value, the outputs thereof being coupled to said multiplier arrangement.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-09-16 | 1989-03-18 | 1989-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-09-16 | 1993-03-18 | 1993-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-09-16 | 1997-03-18 | 1997-09-17 | $7700.00 | Window Closed / Lapsed |