Peak turn-on current limiting base drive

Claim 2

A base drive circuit for a power switching element responsive to first and second external signals, said second signal occurring subsequent to said first signal, said base drive circuit comprising: first, second and third transistors; a charging resistor coupling the base of said first transistor to the base of said third transistor; a capacitor coupling the base of said first transistor to the collector of said second transistor, the emitter of said first transistor connected to the base of said second transistor; a current limiting resistor coupling the emitter of said third transistor to the collector of said second transistor; means coupling the collector of said third transistor to said power switching element; means for coupling the first external signal to said first transistor to provide a ramp signal through said current limiting resistor and said third transistor to said power switching element; means for coupling said second external signal to said second transistor so as to saturate said second transistor and provide a step of current through said third transistor to said power switching element; and means coupled to said third transistor and responsive to the complement of said first signal for clamping said third transistor and thereby biasing said power switching element out of conduction.

Claim 3

The base drive circuit of claim 1 further comprising: means coupled to said power switching element for generating a signal responsive to actual conduction of said power switching element, said generated signal determining when said second external signal is supplied so as to saturate said second transistor.

Claim 4

Base drive circuitry for upper and lower series-connected power switches supplying power to a load connected at the junction of said switches, each of said power switches having a coasting diode connected in inverse parallel therewith, respectively, said base drives each responsive to first and second external control signals, said second control signal occurring subsequent to said first signal, said base drive circuitry comprising: an upper base drive coupled to said upper switch; a lower base drive coupled to said lower switch; each of said base drives including: first, second and third transistors; a charging resistor coupling the base of said first transistor to the base of said third transistor; a capacitor coupling the base of said first transistor to the collector of said second transistor, the emitter of said first transistor connected to the base of said second transistor; a current limiting resistor coupling the emitter of said third transistor to the collector of said second transistor; means for coupling the first external signal to said first transistor to provide a ramp signal through said current limiting resistor and said third transistor to the power switch; means for coupling said second external signal to said second transistor so as to saturate said second transistor and provide a step of current through said third transistor to said power switch; and means coupled to said third transistor and responsive to the complement of said first signal for clamping said third transistor and thereby biasing said power switch out of conduction; said charging resistor of said upper base drive and said charging resistor of said lower base drive each having a value selected so that the ramp signal from said upper base drive is steeper than the ramp signal from said lower base drive.

Claim 5

Base drive circuitry for upper and lower series-connected power switches supplying power to a load connected at the junction of said switches, each of said power switches having a coasting diode connected in inverse parallel therewith, respectively, said base drives each responsive to first and second external control signals, said second control signal occurring subsequent to said first signal, said base drive circuitry comprising: an upper base drive coupled to said upper switch; a lower base drive coupled to said lower switch; each of said base drives including: first, second and third transistors; a charging resistor coupling the base of said first transistor to the base of said third transistor; a capacitor coupling the base of said first transistor to the collector of said second transistor, the emitter of said first transistor connected to the base of said second transistor; a current limiting resistor coupling the emitter of said third transistor to the collector of said second transistor; means for coupling the first external signal to said first transistor to provide a ramp signal through said current limiting resistor and said third transistor to the power switch; means for coupling said second external signal to said second transistor so as to saturate said second transistor and provide a step of current through said third transistor to said power switch; and means coupled to said third transistor and responsive to the complement of said first signal for clamping said third transistor and thereby biasing said power switch out of conduction; said charging resistor of said upper base drive and said charging resistor of said lower base drive each having a value selected so that the ramp signal from said upper base drive is steeper than the ramp signal from said lower base drive.

Claim 6

The base drive circuitry of claim 3 wherein said third transistor of said upper base drive comprises a high voltage NPN transistor, said third transistor performing a level shifting function permitting external logic level signals to be directly coupled to said upper base drive.

Claim 7

A ramp step generator for supplying a ramp signal to a load, responsive to a first and second external signal, comprising: first, second and third transistors; a charging resistor coupling the base of said first transistor to the base of said third transistor; a capacitor coupling the base of said first transistor to the collector of said second transistor, the emitter of said first transistor connected to the base of said second transistor; a current limiting resistor coupling the emitter of said third transistor to the collector of said second transistor; means for coupling the first external signal to said first transistor to provide a ramp signal through said current limiting resistor and said third transistor to said load; and means for coupling said second external signal to said second transistor so as to saturate said second transistor to provide a step of current through said third transistor to said load.

Claim 8

A ramp step generator for supplying a ramp signal to a load, responsive to a first and second external signal, comprising: first, second and third transistors; a charging resistor coupling the base of said first transistor to the base of said third transistor; a capacitor coupling the base of said first transistor to the collector of said second transistor, the emitter of said first transistor connected to the base of said second transistor; a current limiting resistor coupling the emitter of said third transistor to the collector of said second transistor; means for coupling the first external signal to said first transistor to provide a ramp signal through said current limiting resistor and said third transistor to said load; and means for coupling said second external signal to said second transistor so as to saturate said second transistor to provide a step of current through said third transistor to said load.