US4539711A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Tuning control system for a pair of tuners employing a common channel skip memory
Assignee: RCA Licensing Corp
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Filing: 1983-05-02
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Granted: 1985-09-03
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Expires: 2003-05-02
Abstract
Abstract The use of a single skip list memory for two or more tuners is made possible by indexing the starting point of a scanning selection operation to the last channel tuned by the tuner which is to be controlled.
Inventors
- 👤 Mark A. Harger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:52
CPC Classifications
H; H03; H03J; H03J1/00; H03J1/0008; H03J1/0091; G; G11; G11B; G11B19/00; G11B19/02; H03J1/0025; H04; H04N; H04N21/00; H04N21/40; H04N21/41; H04N21/422; H04N21/42204; H04N21/47
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
364 words
Apparatus for controlling first and second tuners, comprising: first selection means for causing consecutive channels to be tuned by said first tuner when activated by a user; second selection means for causing consecutive channels to be tuned by said second tuner when activated by a user; a plurality of addressable skip memory means each corresponding to a respective one of said channels, each for storing a skip or no-skip indication indicating whether or not the respective channel should be skipped or not skipped during channel selection; first last channel memory means for storing the last channel tuned by said first tuner; second last channel memory means for storing the last channel tuned by said second tuner; control means for (1) responsive to the activation of either one of said first or second selection means, addressing said plurality of skip memory means in consecutive channel number order from the one of said plurality of skip memory means corresponding to an initial channel and responsive to the contents of a presently addressed one of said plurality of skip memory means, causing the skip memory means corresponding to the next channel to be addressed if said presently addressed one of said plurality of skip memory means contains a skip indication or stopping the addressing if said presently addressed one of said plurality of skip memory means contains a no-skip indication; (2) responsive to the activation of said first selection means and the contents of said first last channel memory means, setting said initial channel to the last channel tuned by said first tuner and responsive to the activation of said second selection means and the contents of said second last channel memory means, setting said initial channel to the last channel tuned by said second tuner; and (3) causing the storage of the channel corresponding to the one of said plurality of skip memory means at which said addressing is stopped in said first last channel means as said last channel tuned by said first tuner if said first selection means was activated or in said second last channel memory means as said last channel tuned by said second tuner if said second selection means was activated.
Claim 2
Dependent Claim
364 words
Apparatus for controlling first and second tuners, comprising: first selection means for causing consecutive channels to be tuned by said first tuner when activated by a user; second selection means for causing consecutive channels to be tuned by said second tuner when activated by a user; a plurality of addressable skip memory means each corresponding to a respective one of said channels, each for storing a skip or no-skip indication indicating whether or not the respective channel should be skipped or not skipped during channel selection; first last channel memory means for storing the last channel tuned by said first tuner; second last channel memory means for storing the last channel tuned by said second tuner; control means for (1) responsive to the activation of either one of said first or second selection means, addressing said plurality of skip memory means in consecutive channel number order from the one of said plurality of skip memory means corresponding to an initial channel and responsive to the contents of a presently addressed one of said plurality of skip memory means, causing the skip memory means corresponding to the next channel to be addressed if said presently addressed one of said plurality of skip memory means contains a skip indication or stopping the addressing if said presently addressed one of said plurality of skip memory means contains a no-skip indication; (2) responsive to the activation of said first selection means and the contents of said first last channel memory means, setting said initial channel to the last channel tuned by said first tuner and responsive to the activation of said second selection means and the contents of said second last channel memory means, setting said initial channel to the last channel tuned by said second tuner; and (3) causing the storage of the channel corresponding to the one of said plurality of skip memory means at which said addressing is stopped in said first last channel means as said last channel tuned by said first tuner if said first selection means was activated or in said second last channel memory means as said last channel tuned by said second tuner if said second selection means was activated.
Claim 3
Dependent Claim
135 words
The apparatus recited in claim 1 wherein: said control means is included within a microcontroller including an internal data memory having a plurality of memory locations, said plurality of skip memory means and said first and second last channel memory means comprising respective memory locations of said internal data memory; an external memory is coupled to said microcontroller; and said control means (4) transfers the contents of the memory locations of said internal memory corresponding to said plurality of skip memory means and said first and second last channel memory means to respective memory locations of said external memory after the addressing of said plurality of skip memory means is stopped; and (5) transfers the contents of said external memory to said internal memory when one of said first and second selection means is activated.
Claim 4
Dependent Claim
63 words
The apparatus recited in claim 2 further including: power source means for supplying at least one operating voltage for said microcontroller and said external memory switch means for selectively coupling said power source means to said microcontroller after either one of said first or second selection means is actived; and coupling means for continuously coupling said power source means to said external memory.
Claim 5
Dependent Claim
349 words
Apparatus for controlling first and second tuners, comprising: first and second selection means; a plurality of addressable skip memory means each for storing a skip indication indicating that a corresponding channel is not to be tuned or a no-skip indication indicating that a corresponding channel is to be tuned; first last channel memory means for storing a representation of the last channel tuned by said first tuner; second last channel memory means for storing a representation of the last channel tuned by said second tuner; control means for (1) responsive to the activation of said first selection means and the contents of said first last channel memory means, addressing said plurality of skip memory means in a given order from the one of said plurality of skip memory means corresponding to the last channel tuned by said first tuner or responsive to the activation of said second selection means and the contents of said second last channel memory means, addressing said plurality of skip memory means in said given order from the one of said plurality of skip memory means corresponding to the last channel tuned by said second tuner; (2) responsive to the contents of a presently addressed one of said plurality of skip memory means, causing the next one of said plurality of skip memory means in said given order to be addressed if said presently addressed one of said plurality of skip memory means contains a skip indication or stopping the addressing of said plurality of skip memory means if said presently addressed one of said plurality of skip memory means contains a no-skip indication; and (3) causing the storage of the channel representation corresponding to the one of said plurality of skip memory means at which addressing was stopped to be stored in said first last channel memory means as said representation of said last channel tuned by said first tuner if said first selection means was activated or in said second last channel memory means if said second selection means as said representation of said last channel tuned by said second tuner was activated.
Claim 6
Dependent Claim
349 words
Apparatus for controlling first and second tuners, comprising: first and second selection means; a plurality of addressable skip memory means each for storing a skip indication indicating that a corresponding channel is not to be tuned or a no-skip indication indicating that a corresponding channel is to be tuned; first last channel memory means for storing a representation of the last channel tuned by said first tuner; second last channel memory means for storing a representation of the last channel tuned by said second tuner; control means for (1) responsive to the activation of said first selection means and the contents of said first last channel memory means, addressing said plurality of skip memory means in a given order from the one of said plurality of skip memory means corresponding to the last channel tuned by said first tuner or responsive to the activation of said second selection means and the contents of said second last channel memory means, addressing said plurality of skip memory means in said given order from the one of said plurality of skip memory means corresponding to the last channel tuned by said second tuner; (2) responsive to the contents of a presently addressed one of said plurality of skip memory means, causing the next one of said plurality of skip memory means in said given order to be addressed if said presently addressed one of said plurality of skip memory means contains a skip indication or stopping the addressing of said plurality of skip memory means if said presently addressed one of said plurality of skip memory means contains a no-skip indication; and (3) causing the storage of the channel representation corresponding to the one of said plurality of skip memory means at which addressing was stopped to be stored in said first last channel memory means as said representation of said last channel tuned by said first tuner if said first selection means was activated or in said second last channel memory means if said second selection means as said representation of said last channel tuned by said second tuner was activated.
References Cited (Backward Citations)
US4131853A
Cited
GB2003347A
Cited
US4267563A
Cited
US4326220A
Cited
US4355415A
Cited
US4488179A
Cited
GB2087613A
Cited
US4375651A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-09-02 | 1989-03-04 | 1989-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-09-02 | 1993-03-04 | 1993-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-09-02 | 1997-03-04 | 1997-09-03 | $7700.00 | Window Closed / Lapsed |