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US4539580A Expired / Lapsed US ⏱️ 0.0 years remaining

High density integrated circuit device with MOS transistor and semiconductor region having potential wells

Assignee: Toshiba Corp
•
Filing: 1982-09-16
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Granted: 1985-09-03
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Expires: 2002-09-16
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Abstract

Abstract A semiconductor device includes a dynamic memory area formed in a semiconductor substrate and set in an inequilibrium potential state, and a plurality of MOS transistors which emit minority carriers or more than a predetermined number into said semiconductor substrate during operation in a saturation region. Each of the MOS transistors is so arranged that a prolonged line extending in a direction from the source region to the drain region may cross the dynamic memory area.

Inventors

  • 👤 Junichi Matsunaga

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 22:17
CPC Classifications
H; H10; H10B; H10B12/00; H10D; H10D62/00; H10D62/40; H10D62/405

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 114 words
A semiconductor device comprising: a semiconductor substrate; a semiconductor region formed within said semiconductor substrate and having a potential locally susceptible to change by minority carriers; and at least one MOS transistor having source and drain regions and which emits minority carriers of more than a predetermined number into said semiconductor substrate during operation in a saturation region, wherein said semiconductor region is arranged in an area defined by two boundary lines which start from said MOS transistor and form angles of substantially ±45° with respect to a line connecting said source and drain regions, and wherein the material connecting said semiconductor region and said MOS transistor is semiconductor material of uniform conductivity type.
Claim 2
Dependent Claim 114 words
A semiconductor device comprising: a semiconductor substrate; a semiconductor region formed within said semiconductor substrate and having a potential locally susceptible to change by minority carriers; and at least one MOS transistor having source and drain regions and which emits minority carriers of more than a predetermined number into said semiconductor substrate during operation in a saturation region, wherein said semiconductor region is arranged in an area defined by two boundary lines which start from said MOS transistor and form angles of substantially ±45° with respect to a line connecting said source and drain regions, and wherein the material connecting said semiconductor region and said MOS transistor is semiconductor material of uniform conductivity type.
Claim 3
Dependent Claim 40 words
A semiconductor device according to claim 1, wherein said semiconductor region is of substantially rectangular shape, and said at least one MOS transistor is arranged with said two boundary lines being substantially parallel to two sides of said semiconductor region.
Claim 4
Dependent Claim 30 words
A semiconductor device according to claim 2, wherein said at least one MOS transistor is arranged at a distance of not more than 50 μm from said said semiconductor region.
Claim 5
Dependent Claim 29 words
A semiconductor device according to claim 1, wherein said at least one MOS transistor is arranged at a distance of not more than 50 μm from said semiconductor region.
Claim 6
Dependent Claim 123 words
A semiconductor device comprising: a semiconductor substrate; a semiconductor region formed within said substrate and having a potential locally susceptible to change by minority carriers; and at least one MOS transistor having source and drain regions and which emits minority carriers of more than a predetermined number into said semiconductor substrate during operation in a saturation region, wherein said semiconductor region is of substantially rectangular shape and is arranged in an area defined by two boundary lines which start from said MOS transistor and form angles of substantially ±45° with respect to a line connecting said source and drain regions, said at least one MOS transistor being arranged with said two boundary lines being substantially parallel to two sides of said semiconductor region.
Claim 7
Dependent Claim 123 words
A semiconductor device comprising: a semiconductor substrate; a semiconductor region formed within said substrate and having a potential locally susceptible to change by minority carriers; and at least one MOS transistor having source and drain regions and which emits minority carriers of more than a predetermined number into said semiconductor substrate during operation in a saturation region, wherein said semiconductor region is of substantially rectangular shape and is arranged in an area defined by two boundary lines which start from said MOS transistor and form angles of substantially ±45° with respect to a line connecting said source and drain regions, said at least one MOS transistor being arranged with said two boundary lines being substantially parallel to two sides of said semiconductor region.
Claim 8
Dependent Claim 29 words
A semiconductor device according to claim 5, wherein said at least one MOS transistor is arranged at a distance of not more than 50 μm from said semiconductor region.
Claim 9
Dependent Claim 31 words
A semiconductor device according to claim 5 or 6, wherein said at least one MOS transistor is arranged at a distance of not more than 50 μm from said semiconductor region.

References Cited (Backward Citations)

US4163245A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-09-02 1989-03-04 1989-09-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-09-02 1993-03-04 1993-09-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-09-02 1997-03-04 1997-09-03 $7700.00 Window Closed / Lapsed

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