Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
257 words
An inverting/noninverting differential amplifier comprising: first and second matched transistor pairs each including an interconnected common terminal, an output terminal, and an input terminal to which are provided respective input signals with the input signal provided to the second matched transistor pair being maintained at a constant reference voltage, and wherein said input signals are amplified and provided to respective output terminals; third and fourth transistors respectively coupled to said first and second matched transistor pairs and responsive to the amplified input signals produced therein for respectively generating inverted and non-inverted output signals proportional to the difference between said respective input signals, said third and fourth transistors each including a base element coupled to a respective output terminal of said first and second matched transistor pairs, a collector element from which said inverted and non-inverted output signals are derived, and an emitter element coupled in a feedback arrangement to the common terminal of a respective first and second matched transistor pair; a resistive network coupling the common terminals of said first and second matched transistor pairs; a common output load; first and second switch means coupled respectively to said third and fourth transistors and responsive to a switching signal for coupling either the inverted or non-inverted output signal to said common load; and a coupling capacitor connecting said first matched transistor pair and said fourth transistor for phase compensating said inverted and non-inverted output signals coupled to said common load by varying the phase of said non-inverted output signal to match that of said inverted output signal.
Claim 2
Dependent Claim
257 words
An inverting/noninverting differential amplifier comprising: first and second matched transistor pairs each including an interconnected common terminal, an output terminal, and an input terminal to which are provided respective input signals with the input signal provided to the second matched transistor pair being maintained at a constant reference voltage, and wherein said input signals are amplified and provided to respective output terminals; third and fourth transistors respectively coupled to said first and second matched transistor pairs and responsive to the amplified input signals produced therein for respectively generating inverted and non-inverted output signals proportional to the difference between said respective input signals, said third and fourth transistors each including a base element coupled to a respective output terminal of said first and second matched transistor pairs, a collector element from which said inverted and non-inverted output signals are derived, and an emitter element coupled in a feedback arrangement to the common terminal of a respective first and second matched transistor pair; a resistive network coupling the common terminals of said first and second matched transistor pairs; a common output load; first and second switch means coupled respectively to said third and fourth transistors and responsive to a switching signal for coupling either the inverted or non-inverted output signal to said common load; and a coupling capacitor connecting said first matched transistor pair and said fourth transistor for phase compensating said inverted and non-inverted output signals coupled to said common load by varying the phase of said non-inverted output signal to match that of said inverted output signal.
Claim 3
Dependent Claim
245 words
A inverting/noninverting differential amplifier comprising: first and second matched transistor pairs each including an interconnected common terminal, an output terminal, and an input terminal to which are provided respective input signals with the input signal provided to the second matched transistor pair being maintained at a constant reference voltage and wherein said input signals are amplified and provided to respective output terminals; third and fourth transistors respectively coupled to said first and second matched transistor pairs and responsive to the amplified input signals produced therein for respectively generating inverted and non-inverted output signals proportional to the difference between said respective input signals, said third and fourth transistors each including a base element coupled to a respective output terminal of said first and second matched transistor pairs, a collector element from which said inverted and non-inverted output signals are derived, and an emitter element coupled in a feedback arrangement to the common terminal of a respective first and second matched transistor pair; a resistive network coupling the common terminals of said first and second matched transistor pairs; a common output load; first and second switch means coupled respectively to said third and fourth transistors and responsive to a switching signal for coupling either the inverted or non-inverted output signal to said common load; and a coupling capacitor coupling the input terminal of said first matched transistor pair and said common output load for phase compensation of said inverted output signal relative to said non-inverted output signal.
Claim 4
Dependent Claim
245 words
A inverting/noninverting differential amplifier comprising: first and second matched transistor pairs each including an interconnected common terminal, an output terminal, and an input terminal to which are provided respective input signals with the input signal provided to the second matched transistor pair being maintained at a constant reference voltage and wherein said input signals are amplified and provided to respective output terminals; third and fourth transistors respectively coupled to said first and second matched transistor pairs and responsive to the amplified input signals produced therein for respectively generating inverted and non-inverted output signals proportional to the difference between said respective input signals, said third and fourth transistors each including a base element coupled to a respective output terminal of said first and second matched transistor pairs, a collector element from which said inverted and non-inverted output signals are derived, and an emitter element coupled in a feedback arrangement to the common terminal of a respective first and second matched transistor pair; a resistive network coupling the common terminals of said first and second matched transistor pairs; a common output load; first and second switch means coupled respectively to said third and fourth transistors and responsive to a switching signal for coupling either the inverted or non-inverted output signal to said common load; and a coupling capacitor coupling the input terminal of said first matched transistor pair and said common output load for phase compensation of said inverted output signal relative to said non-inverted output signal.
Claim 5
Dependent Claim
37 words
An inverting/noninverting differential amplifier as in claim 2 further including a resistor connected in series with said coupling capacitor for matching the amplitude response of said inverted output signal relative to that of said noninverted output signal.
Claim 6
Dependent Claim
64 words
An inverting/noninverting differential amplifier as in claim 3 further including a voltage variable capacitance and a fixed resistance coupled in series between a potential source and the emitter element of said third transistor for biasing the voltage variable capacitance so as to produce a constant capacitance at the emitter element of said third transistor thereby compensating for nonlinear parasitic capacitance in said differential amplifier.