Multi-layer circuit board inspection system

Abstract

Abstract An inspection system for use in the fabrication of circuit boards of multiple, precisely registered layers. Each layer that is to be precisely registered within the circuit board is formed with at least two targets, each target corresponding in position to a target of another layer, and the targets of each layer defining a pattern that is unique to that layer. Radiography techniques allow a viewing of the registration of each target of a layer relative to a test target pattern. The test target pattern may be carried on a master template for the testing of individual layers for dimensional stability prior to stacking of the layers for lamination. Alternatively, the multiple layers may be stacked in their desired order, in which case the test target pattern for the targets of one layer are formed by the targets of at least two other layers. Layer registration of the multiple layers may be viewed prior to lamination, with adjustment or replacement of any mis-registered layer, or after lamination and prior to further processing. The targets may be formed in positions that define a pattern that is unique to a layer or in configuration that defines a pattern that is unique to a layer, or both.

Inventors

• 👤 Robert F. Benson

Bibliographic Details