Patent US2377426A successfully refreshed from Google Patents.
US4530104A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for reducing errors in a data receiver
Assignee: NCR Voyix Corp
•
Filing: 1983-06-30
•
Granted: 1985-07-16
•
Expires: 2003-06-30
Abstract
Abstract In a data receiver, a complex data signal after demodulation and sampling is applied to an equalizer which provides an improved signal which is applied to a phase and amplitude correction circuit for correction utilizing a complex reference vector. The corrected signal is applied to a decision circuit the input and output of which are applied to a difference determinator circuit, the output of which is a complex residual error signal utilized in conjunction with a plurality of gain factors generated in a gain factors generator to determine the reference vector. The gain factors vary in time from transmission initialization such that optimal compensation for transmission disturbances is achieved both at initialization and after stabilization.
Inventors
- 👤 Adriaan Kamerman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 12:27
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/32; H04L27/34; H04L27/38; H04L27/18; H04L27/22; H04L27/233; H04L27/2332; H04L27/0014; H04L2027/0024; H04L2027/0026; H04L2027/003; H04L2027/0044; H04L2027/0053; H04L2027/0055; H04L2027/0063; H04L2027/0069
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
102 words
A system for reducing errors in a data receiver, said system comprising: means responsive to a complex reference signal for compensating for phase and amplitude errors in an input equalized received signal to provide a compensated received signal; means for developing an output data signal in response to said compensated received signal; means for providing a complex error signal in response to said compensated received signal and said output data signal; means for generating at least one gain factor signal; and means responsive to said complex error signal and to at least one gain factor signal for producing said complex reference signal.
Claim 2
Independent Claim
102 words
A system for reducing errors in a data receiver, said system comprising: means responsive to a complex reference signal for compensating for phase and amplitude errors in an input equalized received signal to provide a compensated received signal; means for developing an output data signal in response to said compensated received signal; means for providing a complex error signal in response to said compensated received signal and said output data signal; means for generating at least one gain factor signal; and means responsive to said complex error signal and to at least one gain factor signal for producing said complex reference signal.
Claim 3
Independent Claim
154 words
A system for reducing errors in a data receiver, said system comprising: means responsive to a reference signal for compensating for phase and amplitude errors in an input equalized received signal to provide a compensated received signal; means responsive to said compensated received signal for developing an output signal; means responsive to said compensated received signal and said output signal for providing an error signal said error signal including an in-phase component and a quadrature component; and means responsive to said error signal and to at least one gain factor signal for producing said reference signal, said producing means including a first circuit responsive to said quadrature component and to at least a first gain factor signal for providing a first signal which is compensated for frequency shift, and a second circuit responsive to said in-phase component, said first signal and to at least a second gain factor signal for providing said reference signal.
Claim 4
Independent Claim
154 words
A system for reducing errors in a data receiver, said system comprising: means responsive to a reference signal for compensating for phase and amplitude errors in an input equalized received signal to provide a compensated received signal; means responsive to said compensated received signal for developing an output signal; means responsive to said compensated received signal and said output signal for providing an error signal said error signal including an in-phase component and a quadrature component; and means responsive to said error signal and to at least one gain factor signal for producing said reference signal, said producing means including a first circuit responsive to said quadrature component and to at least a first gain factor signal for providing a first signal which is compensated for frequency shift, and a second circuit responsive to said in-phase component, said first signal and to at least a second gain factor signal for providing said reference signal.
Claim 5
Dependent Claim
117 words
The system of claim 2 wherein said first circuit comprises: first multiplier means for multiplying said quadrature component by said first gain factor signal to develop a first product signal; first summer means for summing said first product signal and a second sum signal to produce a first sum signal; means for delaying the second sum signal; second multiplier means for multiplying the delayed second sum signal by a third gain factor signal to develop a second product signal; third multiplier means for multiplying said quadrature component by a fourth gain factor signal to develop a third product signal; and second summer means for summing said second and third product signals to produce said second sum signal.
Claim 6
Dependent Claim
85 words
The system of claim 3 wherein said second circuit comprises: fourth multiplier means for multiplying said in-phase component by said second gain factor signal to develop a fourth product signal; means for delaying said reference signal; fifth multiplier means for multiplying a signal comprised of said first sum signal and said fourth product signal by said delayed reference signal to develop a fifth product signal; and third summer means for summing said fifth product signal and said delayed reference signal to produce said reference signal.
Claim 7
Dependent Claim
46 words
The system of claim 4 further including: a third circuit responsive to said quadrature component for providing an averaged correlation signal to modify said first gain factor signal, said first multiplier means being adapted to multiply said quadrature component by the modified first gain factor signal.
Claim 8
Dependent Claim
35 words
The system of claim 5 further including: fourth summer means for summing said averaged correlation signal and said first gain factor signal to apply said modified first gain factor signal to said first multiplier means.
Claim 9
Dependent Claim
18 words
The system of claim 6 wherein: said generating means generates first, second, third and fourth gain factor signals.
Claim 10
Dependent Claim
52 words
The system of claim 7 wherein: said generating means causes each of said first, second, third and fourth gain factor signals to vary in a time dependent manner from an initial signal value when the receiver initially starts to receive transmitted data to a final signal value different from the initial value.
Claim 11
Dependent Claim
41 words
The system of claim 8 wherein: said generating means causes said third gain factor signal to increase towards a value which is close to unity and said fourth gain factor signal to decrease towards a value which is close to zero.
Claim 12
Independent Claim
137 words
A system in a data receiver for compensating for transmission disturbances in a received carrier-modulated transmission, said system comprising: a correction circuit for correcting a previously equalized received signal to provide a corrected received signal; a decision circuit responsive to the corrected received signal for providing an output data signal; a difference determinator circuit responsive to said corrected received signal and said output data signal for providing a complex residual error signal; means for generating a plurality of gain factor signals; and a correction factor determinator circuit responsive to said complex residual error signal and to at least one of said plurality of gain factor signals for providing a complex reference signal to enable said correction circuit to correct the previously equalized received signal by compensating for phase and amplitude errors in said previously equalized received signal.
Claim 13
Independent Claim
137 words
A system in a data receiver for compensating for transmission disturbances in a received carrier-modulated transmission, said system comprising: a correction circuit for correcting a previously equalized received signal to provide a corrected received signal; a decision circuit responsive to the corrected received signal for providing an output data signal; a difference determinator circuit responsive to said corrected received signal and said output data signal for providing a complex residual error signal; means for generating a plurality of gain factor signals; and a correction factor determinator circuit responsive to said complex residual error signal and to at least one of said plurality of gain factor signals for providing a complex reference signal to enable said correction circuit to correct the previously equalized received signal by compensating for phase and amplitude errors in said previously equalized received signal.
Claim 14
Dependent Claim
47 words
The system of claim 10 wherein: said generating means causes each of said gain factor signals to vary in a time dependent manner from an initial signal value when the receiver initially starts to receive transmitted data to a final signal value different from the initial value.
Claim 15
Dependent Claim
78 words
The system of claim 11 wherein said complex error signal includes in-phase and quadrature components and said correction factor determinator comprises: a first compensation circuit responsive to said quadrature component and to at least a first gain factor signal to provide a compensated signal which is compensated for frequency shift; and a second compensation circuit responsive to said in-phase component, said compensated signal and to at least a second gain factor signal to provide said complex reference signal.
References Cited (Backward Citations)
US3855539A
Cited
US3972000A
Cited
GB1503610A
Cited
US3967102A
Cited
US4091331A
Cited
GB2048020A
Cited
GB2048620A
Cited
GB2064274A
Cited
US4253184A
Cited
US4475211A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-07-15 | 1989-01-14 | 1989-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-07-15 | 1993-01-14 | 1993-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-07-15 | 1997-01-14 | 1997-07-16 | $7700.00 | Window Closed / Lapsed |