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US4525838A Expired / Lapsed US ⏱️ 0.0 years remaining

Multibyte error correcting system involving a two-level code structure

Assignee: International Business Machines Corp
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Filing: 1983-02-28
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Granted: 1985-06-25
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Expires: 2003-02-28
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Abstract

Abstract A two-level multibyte error correcting system is disclosed for correcting up to t 1 one-byte errors in a codeword in response to processing 2t 1 non-zero syndrome bytes at the first level and up to t 2 one-byte errors in a codeword in response to processing 2t 2 non-zero syndromes bytes at the second level when processing said 2t 1 syndrome bytes at said first level does not produce an all zero pattern for said 2t 2 syndrome bytes. A relatively long block of data may be divided into subblocks, each of which may contain up to t 1 -x one-byte errors that are correctable at the first level by processing 2t 1 non-zero syndrome bytes where one identifiable subblock of the word may contain up to t 1 +x one-byte errors which are correctable by processing said 2t 2 non-zero syndrome bytes where 0≦x≦(t 2 -t 1 ).

Inventors

  • 👤 Arvind M. Patel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 20:29
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809; H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/13; H03M13/15

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 324 words
A multibyte error correcting system operable to correct up to t 1 errors in each subblock of a block of data and t 2 errors in said block, where t 2 and t 1 are positive integers and t 2 >t 1 , said block having: (a) at least one subblock, each of which has at least one codeword containing up to 2 b -1 b-bit character positions, where b is any positive integer, each character position consisting of a unique combination of binary bits representing data and 2t 1 check bytes; and (b) 2t 2 b-bit block check bytes, said system comprising: first syndrome generating means for generating two 2t 1 syndrome bytes each containing b bits by combining 2t 1 stored check bytes associates with each stored codeword with newly developed 2t 1 check bytes during the reading of each said stored codeword, said check bytes corresponding to the modulo 2 sum of bit positions of said codeword selected systematically in accordance with a predetermined parity check matrix; first syndrome processing circuitry operable to correct up to t 1 errors in each said codeword by processing said 2t 1 syndrome bytes; second syndrome generating means for generating 2t 2 block syndrome bytes each containing b bits by combining said 2t 2 stored block check bytes with 2t 2 block check bytes developed after all said codewords of said block have been read and corrected, each of said t 2 block check bytes corresponding to the modulo 2 sum of bit positions of corrected said codewords that are selected systematically in accordance with said parity check matrix; logic means for developing a new set of block syndrome bytes by modifying said original set of block syndrome bytes to reflect a miscorrection in one of said subblocks; and second syndrome processing circuitry for correcting up to t 2 errors in said one subblock by processing said modified set of 2t 2 block syndrome bytes.
Claim 2
Dependent Claim 324 words
A multibyte error correcting system operable to correct up to t 1 errors in each subblock of a block of data and t 2 errors in said block, where t 2 and t 1 are positive integers and t 2 >t 1 , said block having: (a) at least one subblock, each of which has at least one codeword containing up to 2 b -1 b-bit character positions, where b is any positive integer, each character position consisting of a unique combination of binary bits representing data and 2t 1 check bytes; and (b) 2t 2 b-bit block check bytes, said system comprising: first syndrome generating means for generating two 2t 1 syndrome bytes each containing b bits by combining 2t 1 stored check bytes associates with each stored codeword with newly developed 2t 1 check bytes during the reading of each said stored codeword, said check bytes corresponding to the modulo 2 sum of bit positions of said codeword selected systematically in accordance with a predetermined parity check matrix; first syndrome processing circuitry operable to correct up to t 1 errors in each said codeword by processing said 2t 1 syndrome bytes; second syndrome generating means for generating 2t 2 block syndrome bytes each containing b bits by combining said 2t 2 stored block check bytes with 2t 2 block check bytes developed after all said codewords of said block have been read and corrected, each of said t 2 block check bytes corresponding to the modulo 2 sum of bit positions of corrected said codewords that are selected systematically in accordance with said parity check matrix; logic means for developing a new set of block syndrome bytes by modifying said original set of block syndrome bytes to reflect a miscorrection in one of said subblocks; and second syndrome processing circuitry for correcting up to t 2 errors in said one subblock by processing said modified set of 2t 2 block syndrome bytes.
Claim 3
Dependent Claim 65 words
The system recited in claim 1 in which said parity check matrix reflects the roots α a , α a+1 , α a-2 , . . . α a+2t-1 of a generator polynomial of a finite field of 2 b elements and α is any element of said finite field, and where a is any integer and t is t 1 or t 2 .
Claim 4
Dependent Claim 27 words
The combination recited in claim 2 in which "b" and in which the powers a, a+1, a+2 . . . of the said roots are adjacent integers.
Claim 5
Dependent Claim 32 words
The combination recited in claim 3 in which said powers employed for developing said 2t 1 check bytes are a subset of said powers employed to develop said 2t 2 check bytes.
Claim 6
Dependent Claim 48 words
The system recited in claim 1 in which said logic means includes a codeword buffer for storing each codeword as it is read and for storing error data developed by said first syndrome processing circuitry for said codeword as a result of processing said 2t 1 syndrome bytes.
Claim 7
Dependent Claim 23 words
The combination recited in claim 1 in which said logic means operates to identify the subblock receiving the largest number of byte corrections.
Claim 8
Dependent Claim 25 words
The combination recited in claim 6 in which said second syndrome processing circuitry operates to correct up to t 2 errors in said identified subblock.
Claim 9
Dependent Claim 33 words
The combination recited in claim 7 in which said second syndrome processing circuitry corrects up to said t 2 errors in said one subblock as said block is being transferred from said buffer.
Claim 10
Dependent Claim 68 words
The combination recited in claim 7 in which said system will correct up to (t 1 -x) errors in each subblock by processing said 2t 1 check bytes in said first processing circuitry and up to (t 1 +x) errors in one subblock by processing said 2t 2 check bytes in said second syndrome processing circuitry where x is any non-negative integer and 0≦x≦(t 2 -t 1 ).
Claim 11
Dependent Claim 15 words
The combination recited in claim 1 in which there is one subblock in each block.
Claim 12
Dependent Claim 17 words
The combination recited in claim 1 in which there are a plurality of subblocks in each block.
Claim 13
Dependent Claim 315 words
A multibyte error correcting method operable to correct up to t 1 errors in each subblock of a block of data and t 2 errors in said block being read from storage, where t 2 and t 1 are positive integers and t 2 >t 1 , said block having: (a) at least one subblock, each of which has at least one codeword containing up to 2 b -1 b-bit character positions, where b is any positive integer, each character position including 2t 1 check byte positions; and (b) 2t 2 b-bit block check bytes, said method comprising the following steps: generating two t 1 syndrome bytes each containing b bits by combining said 2t 1 check bytes associates in said storage with each said codeword with 2t 1 check bytes newly developed during the reading of each said codeword from said storage, said check bytes corresponding to the modulo 2 sum of bit positions of said one codeword selected systematically in accordance with a predetermined parity check matrix; processing said 2t 1 syndromes to correct up to t 1 errors in each said codeword; generating 2t 2 block syndrome bytes each containing b bits by combining said 2t 2 block check bytes after all said codewords of said block have been read and corrected, each said block check byte corresponding to the modulo 2 sum of bit positions of corrected said codewords that are selected systematically in accordance with said parity check matrix; developing a new set of 2t 2 block syndrome bytes by modifying the prior set of 2t 2 block syndrome bytes to reflect a previous miscorrection in one of said subblocks in response to said prior set of 2t 2 syndrome bytes having a non-zero condition; and processing said new set of modified block syndrome bytes for correcting up to t 2 errors in said one subblock that was previously miscorrected.
Claim 14
Dependent Claim 315 words
A multibyte error correcting method operable to correct up to t 1 errors in each subblock of a block of data and t 2 errors in said block being read from storage, where t 2 and t 1 are positive integers and t 2 >t 1 , said block having: (a) at least one subblock, each of which has at least one codeword containing up to 2 b -1 b-bit character positions, where b is any positive integer, each character position including 2t 1 check byte positions; and (b) 2t 2 b-bit block check bytes, said method comprising the following steps: generating two t 1 syndrome bytes each containing b bits by combining said 2t 1 check bytes associates in said storage with each said codeword with 2t 1 check bytes newly developed during the reading of each said codeword from said storage, said check bytes corresponding to the modulo 2 sum of bit positions of said one codeword selected systematically in accordance with a predetermined parity check matrix; processing said 2t 1 syndromes to correct up to t 1 errors in each said codeword; generating 2t 2 block syndrome bytes each containing b bits by combining said 2t 2 block check bytes after all said codewords of said block have been read and corrected, each said block check byte corresponding to the modulo 2 sum of bit positions of corrected said codewords that are selected systematically in accordance with said parity check matrix; developing a new set of 2t 2 block syndrome bytes by modifying the prior set of 2t 2 block syndrome bytes to reflect a previous miscorrection in one of said subblocks in response to said prior set of 2t 2 syndrome bytes having a non-zero condition; and processing said new set of modified block syndrome bytes for correcting up to t 2 errors in said one subblock that was previously miscorrected.
Claim 15
Dependent Claim 56 words
The method recited in claim 12 in which said parity check matrix reflects the roots α a , α a+1 , α a+2 , . . . α a+2t-1 of a generator polynomial where αis any element of said finite field, and where a is any integer and t is t 1 or t 2 .
Claim 16
Dependent Claim 45 words
The method recited in claim 12 in which said step of developing said new set of block syndrome bytes includes storing each codeword in a buffer as it is read and storing error data in said buffer developed by processing said 2t 1 syndrome bytes.
Claim 17
Dependent Claim 40 words
The combination recited in claim 14 in which said step of processing for correcting up to t 2 errors in said one subblock occurs on-the-fly as said block is being transferred from an error correcting system to a utilization device.
Claim 18
Dependent Claim 45 words
The method recited in claim 14 in which said step of developing said new set of block syndrome bytes includes identifyng from a plurality of subblocks, each of which had up to t 1 errors corrected, the subblock in which the most bytes were corrected.

References Cited (Backward Citations)

US3418630A Cited
US4211997A Cited
US4416010A Cited
US4334309A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-06-24 1988-12-24 1989-06-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-06-24 1992-12-24 1993-06-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-06-24 1996-12-24 1997-06-25 $7700.00 Window Closed / Lapsed

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