US4525742A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Two-dimensional solid-state image sensor device
Assignee: Fujifilm Holdings Corp
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Filing: 1984-02-13
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Granted: 1985-06-25
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Expires: 2004-02-13
Abstract
Abstract A two-dimensional solid-state image sensor device comprising a plurality of picture cells two-dimensionally arranged in column and row directions. Each cell has a static induction transistor having drain and source regions disposed on opposite sides of a high resistance semiconductor channel region, and a gate region adjacent to the channel region to control a current flowing between the drain and source regions, and a transparent electrode disposed via a capacitance on at least a portion of the gate region, in a manner that light is incident through the transparent electrode to the gate region in which the charge produced by the light excitation is stored to control the current. Selection lines connected to the gate regions in each column in common via the capacitances are sequentially selected. A readout pulse voltage is applied to the selected selection line during one horizontal scanning period and a refresh pulse voltage larger than the readout pulse voltage is applied to the selected selection line during one horizontal blanking period subsequent to the horizontal scanning period. Each picture cell is selected in the column and row directions so that a signal is read out therefrom.
Inventors
- 👤 Junichi Nishizawa
- 👤 Takashige Tamamushi
- 👤 Fumihiko Ando
- 👤 Shigeo Yoshikawa
- 👤 Koji Shimanuki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 19:58
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/196; H04; H04N; H04N25/00; H10F30/00; H10F30/20; H10F30/21; H10F30/28; H10F30/285; H10F30/2863
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
291 words
A two-dimensional solid-state image sensor device, comprising: (a) a plurality of picture cells which are two-dimensionalally arranged in column and row directions; each picture cell comprising: (a-1) a static induction transistor having first and second main electrode regions formed of semiconductor regions with one conductivity type which are disposed on opposite sides of a high resistance semiconductor channel region, and a gate region formed of a semiconductor region with the other conductivity type which is adjacent to said channel region to control a current flowing between said first and second main electrode regions, and (a-2) a transparent electrode disposed via a capacitance on at least a portion of said gate region, in a manner that light is incident through said transparent electrode to said gate region in which the carrier produced by the light excitation is stored to control said current; (b) a plurality of selection lines, each of which connects the gate regions of said picture cells in each column in common via the capacitances; (c) means for sequentially selecting said plurality of selection lines; (d) means for applying a readout pulse voltage to the selected selection lines during one horizontal scanning period and for applying a refresh pulse voltage which is larger than said readout pulse voltage during one horizontal blanking period subsequent to said horizontal scanning period; (e) a plurality of signal readout lines, each of which connects the first main electrode regions of said picture cells in each row in common; (f) means for sequentially selecting said plurality of signal readout lines during one horizontal scanning period; and (g) means for applying a readout pulse to said first main electrode regions to obtain a video signal stored in the picture cell selected by the selected selection line.
Claim 2
Dependent Claim
291 words
A two-dimensional solid-state image sensor device, comprising: (a) a plurality of picture cells which are two-dimensionalally arranged in column and row directions; each picture cell comprising: (a-1) a static induction transistor having first and second main electrode regions formed of semiconductor regions with one conductivity type which are disposed on opposite sides of a high resistance semiconductor channel region, and a gate region formed of a semiconductor region with the other conductivity type which is adjacent to said channel region to control a current flowing between said first and second main electrode regions, and (a-2) a transparent electrode disposed via a capacitance on at least a portion of said gate region, in a manner that light is incident through said transparent electrode to said gate region in which the carrier produced by the light excitation is stored to control said current; (b) a plurality of selection lines, each of which connects the gate regions of said picture cells in each column in common via the capacitances; (c) means for sequentially selecting said plurality of selection lines; (d) means for applying a readout pulse voltage to the selected selection lines during one horizontal scanning period and for applying a refresh pulse voltage which is larger than said readout pulse voltage during one horizontal blanking period subsequent to said horizontal scanning period; (e) a plurality of signal readout lines, each of which connects the first main electrode regions of said picture cells in each row in common; (f) means for sequentially selecting said plurality of signal readout lines during one horizontal scanning period; and (g) means for applying a readout pulse to said first main electrode regions to obtain a video signal stored in the picture cell selected by the selected selection line.
Claim 3
Dependent Claim
29 words
A two-dimensional solid-state image sensor device as claimed in claim 1, wherein an insulation layer is disposed between said gate region and said transparent electrode to form said capacitance.
Claim 4
Dependent Claim
29 words
A two-dimensional solid-state image sensor device as claimed in claim 1, wherein one of said main electrode region is disposed in opposite to one side of said gate region.
Claim 5
Dependent Claim
27 words
A two-dimensional solid-state image sensor device as claimed in claim 1, wherein said refresh pulse voltage is higher at least five times than said readout pulse voltage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-06-24 | 1988-12-24 | 1989-06-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-06-24 | 1992-12-24 | 1993-06-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-06-24 | 1996-12-24 | 1997-06-25 | $7700.00 | Window Closed / Lapsed |