Synchronous video detector circuit using phase-locked loop

Claim 1

A synchronous video detector circuit using a phase-locked loop comprising: voltage-controlled oscillator means for receiving an intermediate frequency output signal from a video IF amplifier and for generating first and second oscillation output signals having a phase difference of approximately π/2 (rad) relative to each other; first multiplier means for receiving said intermediate frequency output signal amplified to a given amplitude level by said video IF amplifier and said first oscillation output signal; second multiplier means for receiving said intermediate frequency output signal amplified to a given amplitude by said video IF amplifier and said second oscillation output signal; coupling means of a type substantially untuned for supplying said intermediate frequency output signal of said video IF amplifier to said first and second multiplier means, respectively; phase-locked mode detecting means for receiving an output signal component of said first multipler means to detect a presence of a video signal output; and low-pass filter means for generating substantially a dc component of an output signal from said second multiplier means as a control signal to said oscillator means, at least a time constant of said low-pass filter means having a value which is selectably changeable with respect to a plurality of values, whereby said time constant of said low-pass filter means is increased in value to provide a narrow band characteristic which attenuates a vertical scanning frequency component when said phase-locked mode detecting means detects that a phase-locked loop including said voltage-controlled oscillator means, said second multiplier means and said low-pass filter means is in a phase-locked mode of operation and said time constant is decreased in value to provide a wider band characteristic than said narrow band characteristic when said phase-locked loop is in any other mode than said phase-locked mode, said voltage-controlled oscillator means including a voltage controlled oscillator circuit comprising a plurality of amplifying means, a load circuit connected between given output electrodes of said amplifying means, feedback means for feeding signal components generated at output terminals of said load circuit back to signal input electrodes of said amplifying means to apply positive feedback thereto, variable current source circuit means having a voltage-controlled input terminal to vary a bias current to said amplifying means, variable voltage source circuit means for detecting a current change in said variable current source circuit means and converting said current change into a voltage change to generate an output in a same direction as said current change, and bias means for supplying an output voltage of said variable voltage source circuit means to said amplifying means to thereby maintain dc bias levels at the output electrodes of said amplifying means at a substantially constant value.