US4524291A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transition detector circuit
Assignee: Motorola Solutions Inc
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Filing: 1983-01-06
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Granted: 1985-06-18
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Expires: 2003-01-06
Abstract
Abstract A noise-tolerant transition detector circuit (2) for detecting when an input signal rises above a first value (V2) and falls below a second value (V1) comprising: comparator means (12, 14) which produces a first output signal when the input signal rises above the first value and a second output signal when the input signal falls below the second value; and bistable means (20) which is set to its first stable state in response to the comparator means first output signal and which is set to its second stable state in response to the comparator means second output signal. Noise may be further reduced by using further bistable means (26) and pulse-forming means (28, 30) may also be employed.
Inventors
- 👤 Heinz Lehning
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 03:33
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/08; H03K5/153; H03K5/1534
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
258 words
A transition detector circuit for detecting when an input signal rises above a first value and falls below a second value different from said first value, the circuit comprising: comparator means having an input for receiving the input signal and having an output, the comparator means producing at its output a first output signal when the input signal rises above said first value and a second output signal when the input signal falls below said second value; first bistable means having an input connected to said output of said comparator means and having an output, said first bistable means being set to a first stable state in response to said first output signal of said comparator means and producing at its output a first output signal indicative of said first stable state and being set to a second stable state in response to such second output signal of said comparator means and producing at its output a second output signal indicative of said second stable state; and second bistable means having an input connected to said output of said first bistable means and having an output, said second bistable means being set to a first stable state in response to such first output signal of such first bistable means and producing at its output a first output signal indicative of such first stable state and being set to a second stable state in response to said second output signal of such first bistable means and producing at its output a second signal indicative of said second stable state.
Claim 2
Dependent Claim
258 words
A transition detector circuit for detecting when an input signal rises above a first value and falls below a second value different from said first value, the circuit comprising: comparator means having an input for receiving the input signal and having an output, the comparator means producing at its output a first output signal when the input signal rises above said first value and a second output signal when the input signal falls below said second value; first bistable means having an input connected to said output of said comparator means and having an output, said first bistable means being set to a first stable state in response to said first output signal of said comparator means and producing at its output a first output signal indicative of said first stable state and being set to a second stable state in response to such second output signal of said comparator means and producing at its output a second output signal indicative of said second stable state; and second bistable means having an input connected to said output of said first bistable means and having an output, said second bistable means being set to a first stable state in response to such first output signal of such first bistable means and producing at its output a first output signal indicative of such first stable state and being set to a second stable state in response to said second output signal of such first bistable means and producing at its output a second signal indicative of said second stable state.
Claim 3
Dependent Claim
59 words
A transition detector circuit according to claim 1 further comprising pulse-producing means having an input connected to said output of said second bistable means and having an output, said pulse-producing means producing at its output a pulse signal in response to a selected one of said first output signal and said second output signal of said second bistable means.
Claim 4
Dependent Claim
119 words
A transition detector according to claim 2 wherein said pulse-producing means comprises: logic means having a first input and a second input connected to receive respectively said first output signal and said second output signal of said second bistable means and having an output, said logic means producing at its output an output signal when a selected one of the output signals of the second bistable means is present and the other one of the output signals of the second bistable means is absent; and delay means connected between the output of said second bistable means and one of the inputs of said logic means for delaying said selected one of the output signals of the second bistable means.
Claim 5
Dependent Claim
112 words
A transition detector circuit according to claim 1, wherein said comparator means comprises: a first comparator having a first input for receiving the input signal, a second input connected to a signal source representative of said first value and having an output, said first comparator producing at its output said first output signal when the input signal rises above said first value; and a second comparator having a first input for receiving the input signal, a second input connected to a signal source representative of said second value and having an output, said second comparator producing at its output said second output signal when the input signal falls below said second value.
Claim 6
Dependent Claim
21 words
A transition detector circuit according to claim 1 wherein said first value and said second value are in a predetermined ratio.
Claim 7
Dependent Claim
39 words
A transition detector circuit according to claim 5 wherein said first value and said second value are defined by respective voltage levels and the circuit further comprises a fixed resistance voltage divider from which said voltage levels are derived.
Claim 8
Dependent Claim
34 words
A transition detector circuit according to claim 1 further comprising means for varying at least one of said first vlaue and said second values independently of the other of said first and second values.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-06-17 | 1988-12-17 | 1989-06-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-06-17 | 1992-12-17 | 1993-06-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-06-17 | 1996-12-17 | 1997-06-18 | $7700.00 | Window Closed / Lapsed |