Comparator timer with dual function adjustment

Claim 2

A timer comprising in combination comparator means having a comparing input terminal connected to an RC charging current circuit, and a reference threshold input terminal, and comparing voltage at said comparing input terminal due to said charging current against threshold trip voltage at said reference terminal, and single means for concurrently changing both charging current and threshold trip voltage for said comparator means.

Claim 3

The invention according to claim 1 wherein said single means is adjusted in one direction to increase charging current and decrease threshold trip voltage to shorten timing intervals, and wherein said single means is adjusted in another direction to decrease charging current and increase threshold trip voltage to lengthen timing intervals.

Claim 4

The invention according to claim 2 wherein said single means comprises single potentiometer means.

Claim 5

The invention according to claim 3 wherein: said potentiometer means comprises a voltage source connected through a wiper to a variable point along a pot resistor; the right end of said pot resistor is connected to said reference threshold input terminal of said comparator means; the left end of said pot resistor is connected through said RC circuit, comprising a resistor R and a capacitor C, to said comparing input terminal of said comparator means for comparison against said reference input terminal; such that when said wiper is moved rightwardly, the threshold trip voltage at said reference input terminal is increased, and the charging current to said capacitor C is decreased, such that it takes longer for the voltage at said comparing input terminal to rise in a given polarity direction above the voltage at said reference input terminal; and such that when said wiper is moved leftwardly, the threshold trip voltage at said reference input terminal is decreased, and the charging current to said capacitor C is increased, such that it takes less time for voltage at said comparing input terminal to rise in a given polarity direction above the voltage at said reference input terminal.

Claim 6

The invention according to claim 4 wherein said right end of said pot resistor is connected through a voltage divider network to said reference input terminal of said comparator means.

Claim 7

The invention according to claim 4 comprising switch means in said RC circuit, said switch means having a first state permitting charging of said capacitor C from said potentiometer means, said switch means having a second state preventing charging of said capacitor C to prevent voltage build-up at said comparing input terminal.

Claim 8

The invention according to claim 6 wherein said switch means is non-conductive in said first state, and is conductive in said second state to short said capacitor C.

Claim 9

The invention according to claim 6 wherein an input trigger signal transition of given polarity activates said switch means to said first state such that voltage increases at said comparing input terminal of said comparator means, and when the voltage at said comparing input terminal rises in a given polarity direction above that at said reference input terminal the output of said comparator means transitions, the length of the timed delay between said input trigger signal transition and said comparator means output transition being set by the adjustment of said potentiometer means.

Claim 10

The invention according to claim 8 wherein the connection to said comparator means comparing input terminal and reference input terminal are interchangeable, to yield the opposite polarity transition of said comparator means output following said input trigger signal transition, whereby to perform an inverting function without an add-on inverter.

Claim 11

The invention according to claim 8 wherein the length of said timed delay exhibits logarithmic advance in the setting of said potentiometer means and movement of said wiper, affording better resolution in the low range.

Claim 12

The invention according to claim 10 wherein said potentiometer means is linear, and said circuit provides a multiplying effect resulting in a log function of said timed delay versus displacement of said wiper.

Claim 13

The invention according to claim 11 wherein: said right end of said pot resistor P is connected through a voltage divider network to said comparator means reference input terminal; said voltage divider network includes resistors R 2 and R 3 ; said RC circuit includes a resistor R 1 ; said potentiometer means is linear; the timed delay T d between said input trigger signal transition and said comparator means output transition is given by the following equation ##EQU2## where P is the resistance of said pot resistor end to end, and k is the fraction of pot resistance from one end of said pot resistor to said wiper.

Claim 14

The invention according to claim 10 wherein: said right end of said pot resistor P is connected through a voltage divider network to said comparator means reference input terminal; said voltage divider network includes resistors R 2 and R 3 ; said RC circuit includes a resistor R 1 ; said resistors are applied in the following ratios R 1 =R 2 =P/10=6.25 R 3 , such that a 100 to 1 timing ratio is obtained by adjusting said wiper end to end; said potentiometer means is linear; such that said timed delay when said wiper is in its leftmost position is a decade faster than when said wiper is in its center position; and such that said timed delay when said wiper is in its rightmost position is a decade slower than when said wiper is in its center position.

Claim 15

A timer comprising in combination: comparator means having plus and minus input terminals, one terminal being a reference threshold input terminal and the other terminal being a comparing input terminal, said comparator means having an output which transitions in response to the voltage at said comparing input terminal rising in a given polarity direction above a threshold trip voltage at said reference input terminal; potentiometer means comprising a voltage source connected through variable resistance means to each of said comparator input terminals, one of said terminals including a charging current capacitor C, such that adjustment of said potentiometer means in one direction increases threshold trip voltage and decreases charging current, to lengthen the delay until said output transitions, and such that adjustment of said potentiometer in another direction decreases threshold trip voltage and increases charging current, to shorten the delay until said output transitions.

Claim 16

A timer comprising in combination: comparator means having plus and minus input terminals, one terminal being a reference threshold input terminal and the other terminal being a comparing input terminal, said comparator means having an output which transitions in response to the voltage at said comparing input terminal rising in a given polarity direction above a threshold trip voltage at said reference input terminal; potentiometer means comprising a voltage source connected through variable resistance means to each of said comparator input terminals, one of said terminals including a charging current capacitor C, such that adjustment of said potentiometer means in one direction increases threshold trip voltage and decreases charging current, to lengthen the delay until said output transitions, and such that adjustment of said potentiometer in another direction decreases threshold trip voltage and increases charging current, to shorten the delay until said output transitions.

Claim 17

The invention according to claim 14 wherein said comparator means comprises an operational amplifier.

Claim 18

The invention according to claim 14 comprising a field effect transistor connected to said capacitor C and shorting the latter in a low resistance ON state to completely discharge said capacitor C and minimize first cycle start-up effects.

Claim 19

The invention according to claim 14 wherein said variable resistance is a pot resistor having a wiper moved therealong from a voltage source, the right end of said pot resistor being connected through a voltage divider network to said minus terminal as the reference input terminal, the left end of said pot resistor being connected in circuit with said capacitor C to the plus terminal as the comparing input terminal, and wherein said connections to said plus and minus terminals may be interchanged to yield the opposite polarity transition of said comparator output.

Claim 20

A proximity switch timer comprising in combination comparator means and potentiometer means for concurrently changing both charging current and threshold trip voltage for said comparator means, said potentiometer means comprising a voltage source connected through a wiper to a variable point along a pot resistor, the right end of said pot resistor being connected to a reference threshold input terminal of said comparator means, the left end of said pot resistor being connected through an RC circuit comprising a resistor R and a capacitor C, to a comparing input terminal of said comparator means for comparison against said reference input terminal, such that when said wiper is moved rightwardly, the threshold trip voltage at said reference input terminal is increased, and the charging current to said capacitor C is decreased, such that it takes longer for the voltage at said comparing input terminal to rise in a given polarity direction above the voltage at said reference input terminal, such that when said wiper is moved leftwardly, the threshold trip voltage at said reference input terminal is decreased, and the charging current to said capacitor C is increased, such that it takes less time for the voltage at said comparing input terminal to rise in a given polarity direction above the voltage at said reference input terminal.

Claim 21

A proximity switch timer comprising in combination comparator means and potentiometer means for concurrently changing both charging current and threshold trip voltage for said comparator means, said potentiometer means comprising a voltage source connected through a wiper to a variable point along a pot resistor, the right end of said pot resistor being connected to a reference threshold input terminal of said comparator means, the left end of said pot resistor being connected through an RC circuit comprising a resistor R and a capacitor C, to a comparing input terminal of said comparator means for comparison against said reference input terminal, such that when said wiper is moved rightwardly, the threshold trip voltage at said reference input terminal is increased, and the charging current to said capacitor C is decreased, such that it takes longer for the voltage at said comparing input terminal to rise in a given polarity direction above the voltage at said reference input terminal, such that when said wiper is moved leftwardly, the threshold trip voltage at said reference input terminal is decreased, and the charging current to said capacitor C is increased, such that it takes less time for the voltage at said comparing input terminal to rise in a given polarity direction above the voltage at said reference input terminal.