US4520324A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOS Gain controlled amplifier
Assignee: National Semiconductor Corp
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Filing: 1983-03-11
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Granted: 1985-05-28
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Expires: 2003-03-11
Abstract
Abstract A circuit is disclosed for operating an MOS transistor in its resistive mode. A cascode transistor is used to clamp the voltage across the resistive transistor to the required level. The circuit gain can be controlled by controlling voltage across the resistive transistor.
Inventors
- 👤 William B. Jett, Jr.
- 👤 Milton E. Wilcox
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 03:32
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/08; H03F1/22; H03F1/223; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45179; H03F3/45183; H03F3/45188; H03G; H03G1/00; H03G1/0005; H03G1/0017; H03G1/0029; H03F2200/00; H03F2200/306; H03F2203/00; H03F2203/45; H03F2203/45466; H03F2203/45704
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
194 words
An MOS transistor variable gain amplifier circuit comprising: a first MOS transistor having source, drain and gate electrodes; supply rails connectable to a source of operating power for providing source and sink rails for the current carriers in said circuit; a second MOS transistor complementary to said first MOS transistor and having source, drain and gate electrodes; means for connecting said source of said second MOS transistor to said source of said first transistor; means for connecting said gate of said second transistor to a source of potential which is selected to control the biasing of said source of said first MOS transistor; means, responsive to a control potential, for varying the voltage between said source and said drain of said first MOS transistor; signal input means coupled to said first MOS transistor to modulate the current therein; and load means coupled in series with the source-drain electrodes of said second MOS transistor for developing a signal output; whereby said first MOS transistor is operated in its resistive region below saturation and said circuit displays a gain between said signal input and said signal output that varies as a function of said control potential.
Claim 2
Dependent Claim
194 words
An MOS transistor variable gain amplifier circuit comprising: a first MOS transistor having source, drain and gate electrodes; supply rails connectable to a source of operating power for providing source and sink rails for the current carriers in said circuit; a second MOS transistor complementary to said first MOS transistor and having source, drain and gate electrodes; means for connecting said source of said second MOS transistor to said source of said first transistor; means for connecting said gate of said second transistor to a source of potential which is selected to control the biasing of said source of said first MOS transistor; means, responsive to a control potential, for varying the voltage between said source and said drain of said first MOS transistor; signal input means coupled to said first MOS transistor to modulate the current therein; and load means coupled in series with the source-drain electrodes of said second MOS transistor for developing a signal output; whereby said first MOS transistor is operated in its resistive region below saturation and said circuit displays a gain between said signal input and said signal output that varies as a function of said control potential.
Claim 3
Dependent Claim
49 words
The circuit of claim 1 wherein said input signal is applied to said gate of said first MOS transistor, and said second MOS transistor has an antiresonant circuit coupled between its drain and said source rail, and tuned to said signal input frequency, thereby to develop said signal output.
Claim 4
Dependent Claim
119 words
The circuit of claim 2 further comprising third and fourth MOS transistors having their source-drain circuits in series; said third MOS transistor having the same conductivity type as said first MOS transistor and said fourth transistor being complementary thereto; said third MOS transistor having a drain coupled to said drain of said first MOS transistor, a source coupled to the source of said fourth transistor, and a gate coupled to a source of signal operating out of phase with respect to the phase of said signal input coupled to said gate of said first transistor; said fourth MOS transistor having its gate coupled to the gate of said second MOS transistor and its drain coupled to said source rail.
Claim 5
Dependent Claim
23 words
The circuit of claim 3 wherein said drain of said fourth MOS transistor is coupled to said source rail via said antiresonant circuit.
Claim 6
Dependent Claim
50 words
The circuit of claim 1 wherein said means for varying the voltage between said source and said drain of said first transistor comprises a constant current device having a control terminal coupled to said signal input means and said control potential is coupled to said gate of said first transistor.
Claim 7
Dependent Claim
133 words
The circuit of claim 5 further comprising fifth and sixth MOS transistors; said fifth MOS transistor being of the same conductivity type as said first and having its source drain circuit coupled in series with the source drain circuit of said sixth transistor which has the same conductivity type as said second MOS transistor; means coupling the drain of said fifth MOS transistor to said drain of said first MOS transistor; means coupling the drain of said sixth transistor to said source rail; means coupling the gate of said sixth MOS transistor to said gate of said second transistor; and means coupling the gate of said fifth MOS transistor to a source of control potential operating in paraphase with said source of control potential coupled to said gate of said first MOS transistor.
References Cited (Backward Citations)
DE1927587A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-05-27 | 1988-11-26 | 1989-05-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-05-27 | 1992-11-26 | 1993-05-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-05-27 | 1996-11-26 | 1997-05-28 | $7700.00 | Window Closed / Lapsed |