US4518930A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Negative resistance circuit for VCO
Assignee: Rockwell Firstpoint Contact Corp
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Filing: 1982-07-30
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Granted: 1985-05-21
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Expires: 2002-07-30
Abstract
Abstract A high-frequency negative resistance circuit for use in a voltage controlled crystal oscillator has a pair of input terminals thereby defining an input current and input voltage. The high-frequency negative resistance circuit includes a sensing circuit for sensing the input current, a biasing voltage source and a load impedance connected to the voltage source. The high-frequency negative resistance circuit further comprises a current mirror circuit connected to the sensing circuit and to the load impedance for producing a current in the load impedance. The current in the load impedance is approximately equal to the input current. The current mirror circuit also controls the sensing circuit to cause the input voltage to decrease as the input current increases. Decreasing input voltage with increasing input current defines the negative resistance. When this negative resistance circuit is configured with a crystal and a voltage controlled capacitance, an oscillator capable of high-frequency operation results. Oscillator parameters such as frequency pullability, startability, stability, temperature, and crystal drive are easily optimized and can be set by mutually independent selection of individual circuit element values. In particular, the crystal drive level is well controlled due to the well-defined limiting character of the negative resistance circuit.
Inventors
- 👤 John G. Rozema
- 👤 William I. H. Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 13:19
CPC Classifications
H; H03; H03B; H03B5/00; H03B5/30; H03B5/32; H03B5/36; H03B5/366; H03B7/00; H03B7/02; H03B7/06; H03B2200/00; H03B2200/0002; H03B2200/0008; H03B5/02; H03B5/04
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
121 words
A high-frequency negative resistance circuit having at least one pair of input terminals, thereby defining an input current at said input terminals which causes a voltage at said input terminals, said circuit comprising: means for sensing the input current; a biasing voltage source; a load impedance connected to said biasing voltage source; and current mirror means connected to said means for sensing and to said load impedance for producing a current in said load impedance approximately equal to said input current and for controlling said means for sensing to cause the voltage at the input terminal to decrease as the input current increases and to increase as the input current decreases, when the input current is less than a knee current.
Claim 2
Dependent Claim
121 words
A high-frequency negative resistance circuit having at least one pair of input terminals, thereby defining an input current at said input terminals which causes a voltage at said input terminals, said circuit comprising: means for sensing the input current; a biasing voltage source; a load impedance connected to said biasing voltage source; and current mirror means connected to said means for sensing and to said load impedance for producing a current in said load impedance approximately equal to said input current and for controlling said means for sensing to cause the voltage at the input terminal to decrease as the input current increases and to increase as the input current decreases, when the input current is less than a knee current.
Claim 3
Dependent Claim
28 words
The high frequency negative resistance circuit of claim 1 further comprising a current source connected to said means for sensing the input current to provide a biasing current.
Claim 4
Dependent Claim
35 words
The high frequency negative resistance circuit of claim 2 wherein said means for sensing the input current is an P-N-P type transistor having its emitter connected to the input terminal and to said current source.
Claim 5
Dependent Claim
98 words
The high frequency negative resistance circuit of claim 1 wherein said means for sensing is a transistor and said current mirror means comprises a first and second NPN type transistors having their bases connected together, the collector of said first transistor connected to its own base and to the collector of said transistor in said means for sensing, the collector of said second transistor connected to the base of said transistor in said means for sensing and to said load impedance, and emitters of each of said first and second transistors each connected to respective parallel resistor-capacitor networks.
Claim 6
Dependent Claim
136 words
A voltage controlled crystal oscillator comprising: crystal means for determining the frequency of oscillation of the oscillator; means for providing a variable voltage: means for changing the load capacitance of the oscillator responsive to said means for providing a variable voltage; current source means for providing a biasing current; means for sensing an input current having an input terminal connected to said crystal means and to said current source means; a constant biasing voltage source; a load impedance connected to said constant voltage source; and current mirror means connected to said means for sensing and to said load impedance for producing a current in said load impedance approximately equal to said input current and for controlling said means for sensing to cause an input voltage to decrease at said input terminal as said input current increases.
Claim 7
Dependent Claim
136 words
A voltage controlled crystal oscillator comprising: crystal means for determining the frequency of oscillation of the oscillator; means for providing a variable voltage: means for changing the load capacitance of the oscillator responsive to said means for providing a variable voltage; current source means for providing a biasing current; means for sensing an input current having an input terminal connected to said crystal means and to said current source means; a constant biasing voltage source; a load impedance connected to said constant voltage source; and current mirror means connected to said means for sensing and to said load impedance for producing a current in said load impedance approximately equal to said input current and for controlling said means for sensing to cause an input voltage to decrease at said input terminal as said input current increases.
Claim 8
Dependent Claim
22 words
The oscillator described in claim 5 wherein said means for changing the load capacitance of the oscillator is a voltage variable capacitor.
Claim 9
Dependent Claim
32 words
The oscillator described in claim 5 wherein said means for sensing said input current is an P-N-P type transistor having its emitter connected to said crystal means, and said current source means.
Claim 10
Dependent Claim
86 words
The oscillator described in claim 7 wherein said current mirror means comprises a first and second N-P-N type transistors having their bases connected together, the collector of said first transistor connected to its own base and to the collector of said transistor in said means for sensing, the collector of said second transistor connected to the base of said transistor in said means for sensing and to said load impedance, and emitters of each of said first and second transistors each conected to parallel resistor-capacitor networks.
Claim 11
Dependent Claim
43 words
The voltage controlled crystal oscillator of claim 5, further comprising an output circuit having a transistor means connected to said current mirror means for sensing a crystal current, and for outputing a sine wave voltage waveform at an output terminal of said oscillator.
Claim 12
Dependent Claim
41 words
The output circuit described in claim 9, wherein said output circuit further comprises a converter means connected to said transistor means for converting said sine wave voltage waveform to a square wave voltage waveform at an output terminal of said oscillator.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-05-20 | 1988-11-19 | 1989-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-05-20 | 1992-11-19 | 1993-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-05-20 | 1996-11-19 | 1997-05-21 | $7700.00 | Window Closed / Lapsed |