Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
367 words
A distributed measurement and control system for industrial processes having a plurality of industrial sensors and industrial controllers, comprising: a host system; a local area network coupled to said host system; at least one programmable industrial measurement and control device coupled to said local area network; said at least one industrial measurement and control device including; a processor having a program ROM and a scratch pad RAM; first means coupled to said processor for providing a plurality of analog input channels for receiving a like plurality of input signals from individual ones of said industrial sensors; second means coupled to said analog input channels and to said processor for selectively conditioning said plurality of analog input signals; third means coupled to said processor and to said second means for repetitively providing digital data representative of corresponding ones of said selectively conditioned analog input signals; fourth means coupled to said processor for providing a plurality of output signal channels connectable to individual ones of said industrial controllers; and fifth means coupled to said processor and to said third and fourth means for repetitively evaluating at least one of a plurality of predetermined measurement and control functions on said data and for actuating in accordance therewith preselected ones of said output signals, said fifth means including a plurality of RAM working registers, a pointer controlled ROM work list for defining the time sequence of functions to be evaluated, a ROM directory table for defining the starting addresses for the control and data structures for each of the functions to be evaluated, a ROM variables control block having for each starting address specified therefor by the directory a table defining RAM addresses for the data structure to be loaded into the RAM working registers for evaluation, a ROM output control block having for each starting address specified therefor by the directory a table defining the RAM addresses for the data and control structures for the RAM working registers after function evaluation, and a ROM program code table having for each starting address specified therefor by the directory a table of instructions in microcode defining individual ones of said at least one of said plurality of predetermined functions to be evaluated.
Claim 2
Dependent Claim
367 words
A distributed measurement and control system for industrial processes having a plurality of industrial sensors and industrial controllers, comprising: a host system; a local area network coupled to said host system; at least one programmable industrial measurement and control device coupled to said local area network; said at least one industrial measurement and control device including; a processor having a program ROM and a scratch pad RAM; first means coupled to said processor for providing a plurality of analog input channels for receiving a like plurality of input signals from individual ones of said industrial sensors; second means coupled to said analog input channels and to said processor for selectively conditioning said plurality of analog input signals; third means coupled to said processor and to said second means for repetitively providing digital data representative of corresponding ones of said selectively conditioned analog input signals; fourth means coupled to said processor for providing a plurality of output signal channels connectable to individual ones of said industrial controllers; and fifth means coupled to said processor and to said third and fourth means for repetitively evaluating at least one of a plurality of predetermined measurement and control functions on said data and for actuating in accordance therewith preselected ones of said output signals, said fifth means including a plurality of RAM working registers, a pointer controlled ROM work list for defining the time sequence of functions to be evaluated, a ROM directory table for defining the starting addresses for the control and data structures for each of the functions to be evaluated, a ROM variables control block having for each starting address specified therefor by the directory a table defining RAM addresses for the data structure to be loaded into the RAM working registers for evaluation, a ROM output control block having for each starting address specified therefor by the directory a table defining the RAM addresses for the data and control structures for the RAM working registers after function evaluation, and a ROM program code table having for each starting address specified therefor by the directory a table of instructions in microcode defining individual ones of said at least one of said plurality of predetermined functions to be evaluated.
Claim 3
Dependent Claim
12 words
The system of claim 1, wherein said host system includes a processor.
Claim 4
Dependent Claim
13 words
The system of claim 1, wherein said host system is an interactive terminal.
Claim 5
Dependent Claim
17 words
The system of claim 1, wherein said local area network includes first and second twisted-wire cable pairs.
Claim 6
Dependent Claim
39 words
The system of claim 4, further including a universal asynchronous receiver transmitter, and wherein said first twisted-wire cable pair is connected to said universal asnychronous receiver transmitter, and wherein said second twisted-wire cable pair is connected to said processor.
Claim 7
Dependent Claim
28 words
The system of claim 1, wherein said second means are integrated circuits selected from the group consisting of Analog Devices hybrid modules numbers 2B54, 2B55, 2B34, and QMX01.
Claim 8
Dependent Claim
65 words
The system of claim 1, wherein said third means includes an analog bus connected to said plurality of analog input channels, a programmable gain amplifier connected to said analog bus, a processor-controlled digital-to-analog convertor, and a comparator, one input to said comparator being connected to the output of said digital-to-analog convertor, the other input of said comparator is the output of said programmable gain amplifier.
Claim 9
Dependent Claim
54 words
The system of claim 1, wherein said fifth means further includes a RAM function control block having for each starting address specified therefor by said directory a plurality of RAM address that specify the locations of RAM registers having parameter values for use during evaluation of corresponding ones of said at least one function.
Claim 10
Dependent Claim
309 words
A programmable industrial measurement and control device for industrial processes having a plurality of industrial sensors and industrial controllers, comprising: a processor having a program ROM and a scratch pad RAM; first means coupled to said processor for providing a plurality of input signals from individual ones of said industrial sensors; second means coupled to said analog input signals and to said processor for selectively conditioning said plurality of analog input signals; third means coupled to said processor and to said second means for repetitively providing digital data representative of corresponding ones of said selectively conditioned analog input signals; fourth means coupled to said processor for providing a plurality of output signal channels connectable to individual ones of said industrial controllers; and fifth means coupled to said processor and to said third and fourth means for repetitively evaluating at least one of a plurality of predetermined industrial measurement and control functions on said data, said fifth means including a plurality of RAM working registers, a pointer controlled ROM work list for defining the time sequence of functions to be evaluated, a ROM directory table for defining the starting addresses for the control and data structures for each of the functions to be evaluated, a ROM variables control block having for each starting address specified therefor by the directory a table defining RAM address for the data structure to be loaded into the RAM working registers for evaluation, a ROM output control block having for each starting address specified therefor by a directory the RAM addresses for the control and data structures to be loaded in the RAM working registers after function evaluation, and a ROM program code table having for each starting address specified therefor in the directory the microcode instructions that define corresponding ones of said at least one of said plurality of predetermined functions to be evaluated.
Claim 11
Dependent Claim
309 words
A programmable industrial measurement and control device for industrial processes having a plurality of industrial sensors and industrial controllers, comprising: a processor having a program ROM and a scratch pad RAM; first means coupled to said processor for providing a plurality of input signals from individual ones of said industrial sensors; second means coupled to said analog input signals and to said processor for selectively conditioning said plurality of analog input signals; third means coupled to said processor and to said second means for repetitively providing digital data representative of corresponding ones of said selectively conditioned analog input signals; fourth means coupled to said processor for providing a plurality of output signal channels connectable to individual ones of said industrial controllers; and fifth means coupled to said processor and to said third and fourth means for repetitively evaluating at least one of a plurality of predetermined industrial measurement and control functions on said data, said fifth means including a plurality of RAM working registers, a pointer controlled ROM work list for defining the time sequence of functions to be evaluated, a ROM directory table for defining the starting addresses for the control and data structures for each of the functions to be evaluated, a ROM variables control block having for each starting address specified therefor by the directory a table defining RAM address for the data structure to be loaded into the RAM working registers for evaluation, a ROM output control block having for each starting address specified therefor by a directory the RAM addresses for the control and data structures to be loaded in the RAM working registers after function evaluation, and a ROM program code table having for each starting address specified therefor in the directory the microcode instructions that define corresponding ones of said at least one of said plurality of predetermined functions to be evaluated.
Claim 12
Dependent Claim
28 words
The device of claim 9, wherein said second means are integrated circuits selected from the group consisting of Analog Devices hybrid module numbers 2B54, 2B55, 2B34, the QMX01.
Claim 13
Dependent Claim
65 words
The device of claim 9, wherein said third means includes an analog bus connected to said plurality of analog input channels, a programmable gain amplifier connected to said analog bus, a processor-controlled digital-to-analog convertor, and a comparator, one input to said comparator being connected to the output of said digital-to-analog convertor, the other input of said comparator is the output of said programmable gain amplifier.
Claim 14
Dependent Claim
54 words
The device of claim 9, wherein said fifth means further includes a RAM function control block having for each starting address specified therefor by the directory a plurality of RAM address that specify the locations of RAM registers having parameter values for use during evaluation of corresponding ones of said at least one function.