Circuit for converting a staircase waveform into a smoothed analog signal

Claim 2

A circuit for converting an input staircase waveform signal (e.g., Σ 1 ) with a regular stepping time interval but different stepping heights into a smoothed analog signal (e.g., ε) comprising: a delay unit for delaying said input staircase signal for one said stepping interval, means for producing a differential signal (e.g., Δ) by taking the difference between said input staircase signal and said one stepping interval delayed version (e.g., Σ 3 ) thereof, means for integrating said differential signal with respect to time at every stepping interval to produce a sawtoothwave signal (e.g., γ) with substantially linear slopes, and means for additively combining said sawtoothwave signal with said one stepping interval delayed version.

Claim 3

A circuit according to claim 1 wherein said delay unit comprises first and second sample-hold circuits (e.g., V, W) in cascade connection and sampling pulse generator (e.g., 3), said generator issues a first sampling pulse sequence (e.g., φ 1 ) in synchronism with said stepping interval timing and a second sampling pulse sequence (e.g. φ 2 ) being a predetermined time delayed version of said first sampling pulse sequence, said first sample-hold circuit receives said input staircase signal (e.g., Σ 1 ) and sample-holds it with said second sampling pulse sequence to produce a version (e.g., Σ 2 ) of the input staircase signal which is delayed for said predetermined time, and said second sample-hold circuit receives said predetermined time delayed version (e.g., Σ 2 ) and sample-holds it with said first sampling pulse sequence to produce said one stepping interval delayed version (e.g., Σ 3 ) of the input staircase signal.

Claim 4

An FM stereo demodulator for a left and right channel signal amplitude-modulated subcarrier including left and right channel units, each channel unit comprising: means for producing a staircase waveform (e.g., Σ 1 ) of the channel signal by sample-holding said amplitude-modulated subcarrier (e.g., φ) at sampling intervals in phase with or in reverse phase with the subcarrier period, a delay unit for receiving said staircase signal and delaying it for one said sampling interval (e.g, T s ), means for producing a differential signal (e.g., Δ) by taking the difference between said staircase signal (e.g., Σ 1 ) and said one sampling interval delayed version (e.g., Σ 3 ) thereof, means for integrating said differential signal with respect to time at every sampling interval to produce a sawtoothwave signal (e.g., γ) with substantially linear slopes, and means for additively combining said sawtoothwave signal with said one sampling interval delayed version to demodulate the channel signal.

Claim 5

An FM stereo demodulator for a left and right channel signal amplitude-modulated subcarrier including left and right channel units, each channel unit comprising: means for producing a staircase waveform (e.g., Σ 1 ) of the channel signal by sample-holding said amplitude-modulated subcarrier (e.g., φ) at sampling intervals in phase with or in reverse phase with the subcarrier period, a delay unit for receiving said staircase signal and delaying it for one said sampling interval (e.g, T s ), means for producing a differential signal (e.g., Δ) by taking the difference between said staircase signal (e.g., Σ 1 ) and said one sampling interval delayed version (e.g., Σ 3 ) thereof, means for integrating said differential signal with respect to time at every sampling interval to produce a sawtoothwave signal (e.g., γ) with substantially linear slopes, and means for additively combining said sawtoothwave signal with said one sampling interval delayed version to demodulate the channel signal.

Claim 6

An FM stereo demodulator according to claim 3 wherein said delayed unit comprises first and second sample-hold circuits (e.g., V, W) in cascade connection and sampling pulse generator (e.g., 3), said generator issues a first sampling pulse sequence (e.g., φ 1 ) in synchronism with said sampling interval timing and a second sampling pulse sequence (e.g., φ 2 ) being a predetermined time (e.g., T d ) delayed version of said first sampling pulse sequence, said first sample-hold circuit receives said input staircase signal (e.g., Σ 1 ) and sample-holds it with said second sampling pulse sequence to produce a version (e.g., Σ 2 ) of the input staircase signal which is delayed for said predetermined time, and said second sample-hold circuit receives said predetermined time delayed version (e.g., Σ 2 ) and sample-holds it with said first sampling pulse sequence to produce said one sampling interval delayed version (e.g., Σ 3 ) of the input staircase signal.