US4514253A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Manufacture of thin film transistor
Assignee: Sharp Corp
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Filing: 1983-07-25
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Granted: 1985-04-30
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Expires: 2003-07-25
Abstract
Abstract A thin film transistor is disclosed which has an insulator substrate, a gate electrode, a semiconductor layer and a source/drain electrode disposed on the insulator substrate. The source/drain electrode is patterned through a combination of mask deposition technique and photo-lithography technique.
Inventors
- 👤 Shigehiro Minezaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 04:50
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/674; H10D30/675
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
135 words
A method of making a thin film transistor device comprising an insulator substrate, a gate electrode, a semiconductor layer and a source/drain electrode disposed on said insulator substrate, which comprises: providing a insulator substrate with a gate electrode formed thereon said gate electrode having a gate insulating oxide coating; forming selectively a semiconductor layer thereon; superimposing a mask over selected portions of said gate insulating coating and said semiconductor layer and depositing a source/drain electrode material thereon; removing said mask and depositing a uniform coating of a photo-resist material on said source/drain electrode material which remains on said substrate; selectively exposing said photo-resist material to light and developing said exposed material to form a resist pattern; etching said resulting patterned configuration to form a desired source/drain electrode pattern thereon to provide said thin film transistor.
Claim 2
Independent Claim
135 words
A method of making a thin film transistor device comprising an insulator substrate, a gate electrode, a semiconductor layer and a source/drain electrode disposed on said insulator substrate, which comprises: providing a insulator substrate with a gate electrode formed thereon said gate electrode having a gate insulating oxide coating; forming selectively a semiconductor layer thereon; superimposing a mask over selected portions of said gate insulating coating and said semiconductor layer and depositing a source/drain electrode material thereon; removing said mask and depositing a uniform coating of a photo-resist material on said source/drain electrode material which remains on said substrate; selectively exposing said photo-resist material to light and developing said exposed material to form a resist pattern; etching said resulting patterned configuration to form a desired source/drain electrode pattern thereon to provide said thin film transistor.
Claim 3
Dependent Claim
23 words
The method of claim 1, wherein said semiconductor layer comprises a Te electrode and said source/drain material is selected from Aμ and Ni.
Claim 4
Dependent Claim
17 words
The method of claim 1, wherein said photo-resist material is deposited to a thickness of 0.3-0.6 μm.
Claim 5
Dependent Claim
16 words
The method of claim 1, wherein said gate insulating oxide coating is formed by anodic oxidation.
Claim 6
Dependent Claim
15 words
The method of claim 1, wherein said gate insulating oxide coating is formed by evaporation.
Claim 7
Independent Claim
185 words
A method of fabricating a coplanar thin film transistor device comprising an insulator substrate, a gate electrode, a semiconductor layer and a source/drain electrode disposed on said insulator substrate, which comprises: providing a insulator substrate with a gate electrode formed thereon said gate electrode having a gate insulating oxide coating; a mask is superimposed over said insulating substrate and said gate insulating coating and a source/drain electrode material is deposited thereon; removing said mask and depositing a uniform coating of a first photo-resist material on said source/drain electrode material which remains; selectively exposing said photo-resist material to light and developing said exposed material to form a first resist pattern; etching said resulting patterned configuration to form a source/drain electrode pattern; applying a second photo-resist coating uniformly to said patterned configuration, selectively exposing said second photo-resist coating to light and developing said exposed coating to form a second resist pattern, and depositing a semiconductor material on said patterned photo-resist coating to form a semiconductor layer and removing said remaining photo-resist pattern material to produce a patterned semiconductor layer thereon and provide said thin film transistor device.
Claim 8
Independent Claim
185 words
A method of fabricating a coplanar thin film transistor device comprising an insulator substrate, a gate electrode, a semiconductor layer and a source/drain electrode disposed on said insulator substrate, which comprises: providing a insulator substrate with a gate electrode formed thereon said gate electrode having a gate insulating oxide coating; a mask is superimposed over said insulating substrate and said gate insulating coating and a source/drain electrode material is deposited thereon; removing said mask and depositing a uniform coating of a first photo-resist material on said source/drain electrode material which remains; selectively exposing said photo-resist material to light and developing said exposed material to form a first resist pattern; etching said resulting patterned configuration to form a source/drain electrode pattern; applying a second photo-resist coating uniformly to said patterned configuration, selectively exposing said second photo-resist coating to light and developing said exposed coating to form a second resist pattern, and depositing a semiconductor material on said patterned photo-resist coating to form a semiconductor layer and removing said remaining photo-resist pattern material to produce a patterned semiconductor layer thereon and provide said thin film transistor device.
Claim 9
Dependent Claim
21 words
The method of claim 6, wherein said semiconductor material comprises Te and said source/drain material is selected from Aμ and Ni.
Claim 10
Dependent Claim
20 words
The method of claim 6, wherein said first and second photo-resist coatings are deposited at a thickness of 0.3-0.6 μm.
Claim 11
Dependent Claim
15 words
The method of claim 6, wherein said insulating oxide coating is formed by anodic oxidation.
Claim 12
Dependent Claim
14 words
The method of claim 6, wherein said insulating oxide coating is formed by evaporation.
Claim 13
Independent Claim
160 words
A method of fabricating a thin film transistor device comprising an insulator substrate, a gate electrode, a semiconductor layer and a source/drain electrode disposed on said insulator substrate, which comprises: providing a insulator substrate with a gate electrode formed thereon said gate electrode having a gate insulating oxide coating; uniformly coating a photo-resist over said insulator substrate and selectively exposing said photo-resist to form a resist pattern thereon; providing a mask over a selected portion of said gate insulating coating and depositing a source/drain electrode material thereon; removing said mask and resist pattern to form a source/drain electrode pattern; applying a second photo-resist coating uniformly to said source/drain electrode pattern, selectively exposing said second photo-resist coating to light and developing said exposed coating to form a second resist pattern; and depositing a semiconductor material on said patterned photo-resist coating and removing said remaining photo-resist pattern material to produce a patterned semi-conductor layer thereon to provide said thin film transistor device.
Claim 14
Independent Claim
160 words
A method of fabricating a thin film transistor device comprising an insulator substrate, a gate electrode, a semiconductor layer and a source/drain electrode disposed on said insulator substrate, which comprises: providing a insulator substrate with a gate electrode formed thereon said gate electrode having a gate insulating oxide coating; uniformly coating a photo-resist over said insulator substrate and selectively exposing said photo-resist to form a resist pattern thereon; providing a mask over a selected portion of said gate insulating coating and depositing a source/drain electrode material thereon; removing said mask and resist pattern to form a source/drain electrode pattern; applying a second photo-resist coating uniformly to said source/drain electrode pattern, selectively exposing said second photo-resist coating to light and developing said exposed coating to form a second resist pattern; and depositing a semiconductor material on said patterned photo-resist coating and removing said remaining photo-resist pattern material to produce a patterned semi-conductor layer thereon to provide said thin film transistor device.
Claim 15
Dependent Claim
18 words
The method of claim 11, wherein said semiconductor layer comprises Te and said source/drain electrode material is Ni.
Claim 16
Dependent Claim
16 words
The method of claim 11, wherein said gate insulating oxide coating is formed by anodic oxidation.
Claim 17
Dependent Claim
15 words
The method of claim 11, wherein said gate insulating oxide coating is formed by evaporation.
References Cited (Backward Citations)
US4065781A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-04-29 | 1988-10-29 | 1989-04-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-04-29 | 1992-10-29 | 1993-04-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-04-29 | 1996-10-29 | 1997-04-30 | $7700.00 | Window Closed / Lapsed |