← Back to Patent Explorer
US4513252A Expired / Lapsed US ⏱️ 0.0 years remaining

Active load circuit

Assignee: Fujitsu Ltd
•
Filing: 1983-12-15
•
Granted: 1985-04-23
•
Expires: 2003-12-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An active load circuit including a current mirror circuit used for a load to a differential amplifier, an output transistor outputting the amplified signal in response to the differential input to the differential amplifier, and a constant current source. The current mirror circuit includes a pair of load transistors and a third transistor provided to improve the circuit stability and the amplification factor. The collector of the output transistor is connected to the emitter of the third transistor to further improve the circuit stability and the amplification factor.

Inventors

  • 👤 Yoshiaki Sano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 09:15
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/45; H03F3/45071

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 114 words
An active load circuit, comprising: first and second transistors each having an emitter connected to a voltage source and each having a collector and a base; a third transistor having an emitter connected to the bases of said first and second transistors and a base connected to one of the collectors of said first and second transistors, causing equal collector currents to flow in said first and second transistors; a fourth transistor having a collector connected to the emitter of said third transistor, a base connected to the other of the collectors of said first and second transistors, and an emitter; and a constant current source connected to the emitter of said fourth transistor.
Claim 2
Dependent Claim 114 words
An active load circuit, comprising: first and second transistors each having an emitter connected to a voltage source and each having a collector and a base; a third transistor having an emitter connected to the bases of said first and second transistors and a base connected to one of the collectors of said first and second transistors, causing equal collector currents to flow in said first and second transistors; a fourth transistor having a collector connected to the emitter of said third transistor, a base connected to the other of the collectors of said first and second transistors, and an emitter; and a constant current source connected to the emitter of said fourth transistor.
Claim 3
Dependent Claim 154 words
An amplifier circuit, comprising: first and second transistors each having an emitter connected to a voltage source and each having a collector and a base; a third transistor having an emitter connected to the bases of said first and second transistors and a base connected to one of the collectors of said first and second transistors, causing equal collector currents to flow in the first and second transistors; a fourth transistor having a collector connected to the emitter of said third transistor, a base connected to the other of the collectors of said first and second transistors, and an emitter; a first constant current source connected to the emitter of said fourth transistor; and current control means having first and second current sources respectively connected to the collectors of said first and second transistors, for varying a difference in currents produced by said first and second current sources in response to an input signal.
Claim 4
Dependent Claim 154 words
An amplifier circuit, comprising: first and second transistors each having an emitter connected to a voltage source and each having a collector and a base; a third transistor having an emitter connected to the bases of said first and second transistors and a base connected to one of the collectors of said first and second transistors, causing equal collector currents to flow in the first and second transistors; a fourth transistor having a collector connected to the emitter of said third transistor, a base connected to the other of the collectors of said first and second transistors, and an emitter; a first constant current source connected to the emitter of said fourth transistor; and current control means having first and second current sources respectively connected to the collectors of said first and second transistors, for varying a difference in currents produced by said first and second current sources in response to an input signal.
Claim 5
Dependent Claim 61 words
An amplifier circuit according to claim 2, wherein said first and second current sources comprise: a pair of transistors each having an emitter, each having a base for receiving a differential input signal, and each having a collector respectively connected to said first and second transistors; and a second constant current source connected to the emitters of said pair of transistors.

References Cited (Backward Citations)

US4398160A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-04-22 1988-10-22 1989-04-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-04-22 1992-10-22 1993-04-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-04-22 1996-10-22 1997-04-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag