US4507572A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage sensing circuit
Assignee: Citizen Watch Co Ltd
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Filing: 1984-06-11
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Granted: 1985-03-26
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Expires: 2004-06-11
Abstract
Abstract A voltage sensing circuit is disclosed, which utilizes a reference voltage generating circuit for producing a reference voltage whose value is determined as a function of absolute temperature, independent of circuit element variations, the reference voltage being generated by means of a pair of MOS field effect transistors having different values of Id/K, where Id is drain current and K is the channel pattern ratio W/L.
Inventors
- 👤 Shingo Hashimoto
- 👤 Mitsuo Sekine
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 18:57
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/24; H03K5/2472; H03K5/2481; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
301 words
A reference voltage generating circuit, comprising: first and second MOS field-effect transistors having the source and substrate electrodes thereof connected in common to a first supply potential, and with the gate electrodes thereof connected in common; a third MOS field-effect transistor having the gate and drain electrodes thereof connected in common to the drain electrode of said first MOS field-effect transistor, and the substrate and source electrodes thereof connected in common to a second supply potential; a fourth MOS field-effect transistor having the gate electrode thereof connected to the drain electrodes of said first and third MOS field-effect transistors, the drain electrode thereof connected to the drain electrode of said second MOS field-effect transistor, the substrate electrode connected to said second supply potential, and the source electrode thereof connected through a first resistor to said second supply potential; a fifth MOS field-effect transistor having the gate electrode thereof connected to the drain electrodes of said second and fourth MOS field-effect transistors, the substrate and source electrodes thereof connected to said first supply potential, and the drain electrode thereof connected to said second supply potential through a second resistor; the value of the ratio K of the channel width to channel length of said second MOS field-effect transistor being a predetermined multiple of the ratio of channel width to channel length of said first MOS field-effect transistor, and the ratio of channel width to channel length of said fifth MOS field-effect transistor being a predetermined multiple of the ratio of channel width to channel length of said second MOS field-effect transistor, whereby a reference voltage of amplitude determined by the relative channel dimensions of said first, second and fifth MOS field-effect transistors and by the ratio of the resistance values of said first and second resistors is developed across said second resistor.
Claim 2
Dependent Claim
301 words
A reference voltage generating circuit, comprising: first and second MOS field-effect transistors having the source and substrate electrodes thereof connected in common to a first supply potential, and with the gate electrodes thereof connected in common; a third MOS field-effect transistor having the gate and drain electrodes thereof connected in common to the drain electrode of said first MOS field-effect transistor, and the substrate and source electrodes thereof connected in common to a second supply potential; a fourth MOS field-effect transistor having the gate electrode thereof connected to the drain electrodes of said first and third MOS field-effect transistors, the drain electrode thereof connected to the drain electrode of said second MOS field-effect transistor, the substrate electrode connected to said second supply potential, and the source electrode thereof connected through a first resistor to said second supply potential; a fifth MOS field-effect transistor having the gate electrode thereof connected to the drain electrodes of said second and fourth MOS field-effect transistors, the substrate and source electrodes thereof connected to said first supply potential, and the drain electrode thereof connected to said second supply potential through a second resistor; the value of the ratio K of the channel width to channel length of said second MOS field-effect transistor being a predetermined multiple of the ratio of channel width to channel length of said first MOS field-effect transistor, and the ratio of channel width to channel length of said fifth MOS field-effect transistor being a predetermined multiple of the ratio of channel width to channel length of said second MOS field-effect transistor, whereby a reference voltage of amplitude determined by the relative channel dimensions of said first, second and fifth MOS field-effect transistors and by the ratio of the resistance values of said first and second resistors is developed across said second resistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-03-25 | 1988-09-24 | 1989-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-03-25 | 1992-09-24 | 1993-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-03-25 | 1996-09-24 | 1997-03-26 | $7700.00 | Window Closed / Lapsed |