Digital to analog converter

Claim 3

The method of claim 1 wherein said electrical characteristic is amplitude.

Claim 4

A digital to analog converter comprising: input means for receiving a stream of multibit digital data words comprised of a composite waveform of information signal content plus noise; means for measuring the signal to noise ratio associated with the digital word to be converted; processing means for generating a probability value for each bit corresponding to the probability that the bit is a given logical state as a function of electrical characteristics of the waveform at each bit position and the measured signal to noise ratio; conversion circuitry including a series of analog multipliers operative to multiply an input by relative analog weighting values associated with each bit; summation means connected to outputs of said analog multipliers, operative to generate an analog signal output; and means for coupling said probability values to inputs of said analog multipliers for use as scaling factors to modify the conversion process thereby reducing errors.

Claim 5

A digital to analog converter comprising: input means for receiving a stream of multibit digital data words comprised of a composite waveform of information signal content plus noise; means for measuring the signal to noise ratio associated with the digital word to be converted; processing means for generating a probability value for each bit corresponding to the probability that the bit is a given logical state as a function of electrical characteristics of the waveform at each bit position and the measured signal to noise ratio; conversion circuitry including a series of analog multipliers operative to multiply an input by relative analog weighting values associated with each bit; summation means connected to outputs of said analog multipliers, operative to generate an analog signal output; and means for coupling said probability values to inputs of said analog multipliers for use as scaling factors to modify the conversion process thereby reducing errors.

Claim 6

The converter of claim 3 wherein said signal to noise measurement means comprises: means for measuring the noise associated with the waveform apart from the information signal content thereof, and computational logic means for computing the signal to noise ratio as a function of the measured noise and electrical characteristics of the composite waveform.

Claim 7

The converter of claim 3 wherein said processor is adapted to generate said probability values according to the following equation: ##EQU13## where E b =a 2 is the normalized energy of the waveform for each bit position, S/N is the signal to noise ratio, and R is a constant.

Claim 8

The apparatus of claim 4 which further comprises: a serial to parallel shift register for storing sequential probability values for a digital word; a series of digital multipliers connected for parallel receipt of digital representations of said probability values, said digital multipliers being operative to multiply the probability values with digital weighting factor values associated with each bit position; a digital adder circuit operative to add together the outputs of each of the digital multipliers and generate a multibit digital number therefore; a storage register for temporarily storing said digital number output from the adder circuit; and means for generating an analog signal equivalent of the digital number stored in said storage register.