US4498151A
Expired / Lapsed
US
⏱️ 0.0 years remaining
On board non-volatile memory programming
Assignee: Siemens Industrial Automation Inc
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Filing: 1984-01-17
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Granted: 1985-02-05
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Expires: 2004-01-17
Abstract
Abstract A digital system is disclosed for programming a non-volatile memory, such as a programmable read only memory (PROM), while it is in situ in the operating system of which it forms a part. The digital system includes a read/write (R/W) memory and a non-volatile memory which communicate with one another through a two-way data communication bus. Data, address, and circuit select signals are provided to the R/W memory to enter information therein. Upon completion of entry of the data (e.g., a control program) into R/W memory, timing circuitry provides selective signals, such as circuit select, program pulse and program voltage signals to the non-volatile PROM memory and the data or control program is transferred to the PROM memory without removing the PROM from the system. Additional circuitry allows this data or control program stored in the PROM memory to be transferred back to R/W memory, modified and then transferred back to PROM memory. Verify circuitry is included to compare the R/W memory data with the PROM memory data for differences to indicate programming errors and also to check the PROM to ensure, prior to programming, that it is completely erased and ready for programming.
Inventors
- 👤 Raymond W. Henry
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 20:43
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/05; G05B19/056; G11; G11C; G11C29/00; G11C29/52; G05B2219/00; G05B2219/10; G05B2219/13; G05B2219/13002; G05B2219/13013
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
336 words
A digital system for on board programming of a non-volatile memory comprising: (a) A read/write memory included within said system for storing data therein, (b) a non-volatile memory, said non-volatile memory comprised of means for programming said memory and means for writing data therein, (c) circuit means for transferring data into and out of each of said memories, said circuit means including means for generating enabling/disabling signals to said non-volatile memory and to said read/write memory during programming of said non-volatile memory, (d) timing means coupled to said non-volatile memory for generating a program pulse of predetermined duration to said non-volatile memory, (e) means for generating a program voltage signal of predetermined magnitude and applying said voltage signal to said non-volatile memory, said enabling/disabling signals, program pulse and program voltage signals being generated within said system and effecting transfer of data from said read/write memory to said non-volatile memory without removing said non-volatile memory from said system, (f) means for verifying proper programming of said non-volatile memory by the read/write memory comprising: data circuit means coupled to said memories for transmitting the data outputs from each of said memories, electrically energizable visual means coupled to said data circuit means, comparator means coupled to said data circuit means for comparing the outputs for differences between the data in the non-volatile memory and the read/write memory and energizing said visual means upon detecting any of said differences, and latching means coupled to said visual means and adapted to latch the visual means in the energized state when energized as a result of detecting any of said differences, and means to vary when said program pulse signal starts within a scan of memory whereby different portions of the memory contents can be scanned to determine the exact location of any error, and means for changing the read/write memory storage input to said comparator to a constant voltage level and comparing said non-volatile memory output to said constant voltage level to determine whether said non-volatile memory has been completely erased.
Claim 2
Dependent Claim
336 words
A digital system for on board programming of a non-volatile memory comprising: (a) A read/write memory included within said system for storing data therein, (b) a non-volatile memory, said non-volatile memory comprised of means for programming said memory and means for writing data therein, (c) circuit means for transferring data into and out of each of said memories, said circuit means including means for generating enabling/disabling signals to said non-volatile memory and to said read/write memory during programming of said non-volatile memory, (d) timing means coupled to said non-volatile memory for generating a program pulse of predetermined duration to said non-volatile memory, (e) means for generating a program voltage signal of predetermined magnitude and applying said voltage signal to said non-volatile memory, said enabling/disabling signals, program pulse and program voltage signals being generated within said system and effecting transfer of data from said read/write memory to said non-volatile memory without removing said non-volatile memory from said system, (f) means for verifying proper programming of said non-volatile memory by the read/write memory comprising: data circuit means coupled to said memories for transmitting the data outputs from each of said memories, electrically energizable visual means coupled to said data circuit means, comparator means coupled to said data circuit means for comparing the outputs for differences between the data in the non-volatile memory and the read/write memory and energizing said visual means upon detecting any of said differences, and latching means coupled to said visual means and adapted to latch the visual means in the energized state when energized as a result of detecting any of said differences, and means to vary when said program pulse signal starts within a scan of memory whereby different portions of the memory contents can be scanned to determine the exact location of any error, and means for changing the read/write memory storage input to said comparator to a constant voltage level and comparing said non-volatile memory output to said constant voltage level to determine whether said non-volatile memory has been completely erased.
Claim 3
Dependent Claim
14 words
A system according to claim 1 further including visual means for detecting such differences.
Claim 4
Dependent Claim
16 words
A system according to claim 1 wherein said non-volatile memory is a programmable read only memory.
Claim 5
Dependent Claim
19 words
A system according to claim 3 wherein said programmable read only memory is an ultraviolet programmable read only memory.
Claim 6
Dependent Claim
13 words
A system according to claim 1 wherein said system is a programmable controller.
Claim 7
Dependent Claim
34 words
A system according to claim 1 wherein said means for generating enabling/disabling signals generates enabling signals to the non-volatile memory and generates disabling signals to the read/write memory during programming of said non-volatile memory.
Claim 8
Dependent Claim
21 words
A system according to claim 1 wherein said data circuit means include a serial-to-parallel converter coupled to each of said memories.
Claim 9
Dependent Claim
16 words
A system according to claim 7 further including a data register coupled to said serial-to-parallel converter.
References Cited (Backward Citations)
US4402057A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-02-05 | 1988-08-06 | 1989-02-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-02-05 | 1992-08-06 | 1993-02-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-02-05 | 1996-08-06 | 1997-02-05 | $7700.00 | Window Closed / Lapsed |