Motor speed control circuit

Claim 1

In combination with an electric motor; a motor speed control circuit comprising a phase-locked loop composed of a plurality of components including means for producing a speed signal having a frequency proportional to the speed of said motor, a frequency-divider operative to divide said speed signal by a selected dividing ratio, a reference oscillator for supplying a reference oscillating signal, a phase comparator for comparing the phase of said reference oscillating signal to that of the frequency-divided speed signal and to produce an error signal as a function of the phase difference therebetween, filter means for filtering said error signal, and amplifier means for amplifying said filtered error signal to produce a motor control signal, said motor control signal being supplied to said motor; selecting means for selecting the dividing ratio of said frequency divider and thereby select the rotational speed of said motor; means for producing an output signal corresponding to said selected dividing ratio; and means for supplying said output signal to one of said phase comparator, filter means and amplifier means for varying the gain thereof in accordance with said dividing ratio of the frequency-divider to a value which compensates for changes in the overall gain of said loop resulting from changes in rotational speed of the motor so that said overall gain of said phase-locked loop is maintained substantially constant regardless of said rotational speed of the motor.