Digital-analog conversion for shaft encoders

Claim 2

In a system including a shaft rotatable about a longitudinal axis in a first and a second direction and a shaft encoder coupled thereto, apparatus for converting a pair of signals produced by the shaft encoder to an analog signal that is indicative of the direction and a rate of rotation of the shaft, each one of the signals comprising a stream of pulses, the pulses of a one of the pair of the signals being shifted in phase relative to the pulses of the other of the pair of signals to indicate direction of rotation, the apparatus comprising: comparing means adapted to receive said signals and being responsive thereto for providing a binary signal indicative of the direction of rotation; pulse means adapted to receive the one of the pair of signals for providing therefrom a pulse train comprising a plurality of digital pulses of a fixed pulse width, one digital pulse corresponding to each of the pulses contained in the one signal; and circuit means responsive to the binary signal and the digital pulse train for integrating the pulse train in response to the first direction of rotation of the shaft and for inverting and integrating the inverted form of the pulse train in response to a second direction of rotation of the shaft, the circuit means including means for forming the analog signal from the integration of the pulse train.

Claim 3

The apparatus of claim 1, wherein the comparing means includes a bistable circuit having a clock input for receiving the one of the pair of signals and a data input for receiving the other of the pair of signals.

Claim 4

The apparatus of claim 1, including wave shaping means adapted to be interposed between the shaft encoder and the comparing means and pulse means for receiving said pair of signals and for producing therefrom digital waveforms corresponding to each of the pair of signals, the wave shaping means being coupled to the comparing means for communicating the digital waveforms thereto.

Claim 5

The apparatus of claim 1, the circuit means including gate means coupled to receive the binary signal and the pulse train to produce therefrom the pulse train or the inverted form of the pulse train in response to presence or absence of the binary signal, respectively.

Claim 6

The apparatus of claim 1, the circuit means including means for causing the analog signal to assume a predetermined value indicative of the absence of shaft rotation.

Claim 7

The apparatus of claim 1, wherein the circuit means further includes means for biasing the analog signal towards a quiescent value, the analog signal having an amplitude responsive to the rate and direction of the shaft rotation.

Claim 8

The apparatus of claim 6, wherein the circuit means further includes a first and a second resistor each coupled to an integrating capacitor, the first resistor coupled to couple the inverted form of the pulse train to the capacitor, the second resistor coupled to couple the pulse train to the capacitor, the first resistor having a larger resistance than that of the second resistor.

Claim 9

The apparatus of claim 7, further including an output terminal means for isolating the analog signal from and coupling the analog signal to the output terminal.

Claim 10

Apparatus for converting a stream of pulses produced by a shaft encoder comprising: a rotatable shaft; first pulse generation means for producing a first pulse train in response to rotation of said rotatable shaft; second pulse generation means for producing a second pulse train in response to rotation of said rotatable shaft; comparing means adapted to receive said first pulse train and said second pulse train and providing therefrom a binary response indicative of the direction of rotation of said rotatable shaft; third pulse generation means for producing a third pulse train, the frequency of said third pulse train being a function of the rotation frequency of said rotatable shaft; and circuit means responsive to said third pulse train for integrating said third pulse train in response to a first direction of rotation of said rotatable shaft and integrating an inverted form of said third pulse train in response to a second direction of rotation of said rotatable shaft opposite said first direction, to produce an analog signal, said circuit means including a first nand gate, the inputs of said first nand gate consisting of said third pulse train and said binary response, a second nand gate, the inputs of said second nand gate consisting of said third pulse train and a signal in a state opposite that of said binary response, an inverter whose input consists of the output of said second nand gate, and an integration means for integrating the output of said first nand gate and said inverter.

Claim 11

Apparatus for converting a stream of pulses produced by a shaft encoder comprising: a rotatable shaft; first pulse generation means for producing a first pulse train in response to rotation of said rotatable shaft; second pulse generation means for producing a second pulse train in response to rotation of said rotatable shaft; comparing means adapted to receive said first pulse train and said second pulse train and providing therefrom a binary response indicative of the direction of rotation of said rotatable shaft; third pulse generation means for producing a third pulse train, the frequency of said third pulse train being a function of the rotation frequency of said rotatable shaft; and circuit means responsive to said third pulse train for integrating said third pulse train in response to a first direction of rotation of said rotatable shaft and integrating an inverted form of said third pulse train in response to a second direction of rotation of said rotatable shaft opposite said first direction, to produce an analog signal, said circuit means including a first nand gate, the inputs of said first nand gate consisting of said third pulse train and said binary response, a second nand gate, the inputs of said second nand gate consisting of said third pulse train and a signal in a state opposite that of said binary response, an inverter whose input consists of the output of said second nand gate, and an integration means for integrating the output of said first nand gate and said inverter.

Claim 12

The apparatus in claim 9 wherein comprising means comprises a flip-flop.

Claim 13

The circuit in claim 9 wherein said circuit means comprises a resistor-capacitor network.

Claim 14

The circuit in claim 11 wherein said resistor-capacitor network comprises a first resistor between said inverter and a first node;

Claim 15

a first pullup resistor between a power source and said first node; a second resistor between said first node and a second node; a third resistor between said second node and an output terminal; a capacitor between said second node and a ground node; a fourth resistor between the output of said first nand gate and a third node; a second pullup resistor between a power source and said third node; and a resistor between said third node and said second node.

Claim 16

a first pullup resistor between a power source and said first node; a second resistor between said first node and a second node; a third resistor between said second node and an output terminal; a capacitor between said second node and a ground node; a fourth resistor between the output of said first nand gate and a third node; a second pullup resistor between a power source and said third node; and a resistor between said third node and said second node.

Claim 17

The circuit in claim 12 wherein said third pulse generating means comprises a one-shot.