Pipelined digital filters

Claim 1

An improvement in a digital filter having a non-recursive portion and a recursive portion, wherein said digital filter has a function y=a o x+a 1 D 1 x+a 2 D 2 x+. . . a m D m x-(b 1 D 1 +. . . +b n D n y), in which the terms containing a m represent the non recursive portion and a o , a 1 . . . a m are constants, the terms containing b 1 . . . b n represent the recursive portion and b 1 . . . b n are constants, and D m and D n are delay operators, and wherein said digital filter operates at a clock frequency f s , said clock frequency f s also being the frequency at which an input signal x to said digital filter has been sampled, said non-recursive portion and said recursive portion each having at least one 1-stage parallel multiply-add means with one stage for multiplying digital signals by said constants and for adding two digital signals and for delaying digital signals by one clock period, wherein the improved digital filter comprises: (a) said parallel multiply-add means in said recursive portion including parallel pipeline multiply-add means with more than one stage for multiplying digital signals by said constants and for adding two digital signals. (b) said improved digital filter providing a higher order function which is operationally the same as said function y but delayed by a number D of sample times; and (c) said improved digital filter being operable at a clock frequency which is greater than f s and determined by the number of stages in said parallel pipeline multiply-add means.