US4491862A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Color-television receiver with at least one digital integrated circuit for processing the composite color signal
Assignee: ITT Inc
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Filing: 1982-06-15
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Granted: 1985-01-01
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Expires: 2002-06-15
Abstract
Abstract To digitally synchronize the chrominance-subcarrier oscillator in the form of a phase-locked loop with the color burst contained in the composite color signal, suitable digital subcircuits are provided. During the keying pulse, the digital R-Y and B-Y color-difference signals are accumulated line by line. The corresponding R-Y value is then added to a desired phase value or a tint-control value, and for deviations from the burst phase between +90° and -90°, the sum signal, after being limited if necessary, is applied to a digital-to-analog converter, filtered in a low-pass filter, and then used to control the chrominance-subcarrier oscillator. If the phase deviations lie between +90° and +180° or -90° and -180°, the digital-to-analog converter is constantly fed with the upper or the lower limit value, respectively, via a switching stage. The latter has three switch positions, one for direct transfer and one for each of the two limit values, with the sign bit of the accumulated R-Y or B-Y value effecting the appropriate selection.
Inventors
- 👤 Peter M. Flamm
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:10
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/44; H04N9/455
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
214 words
Color television circuitry comprising: a chrominance subcarrier oscillator for generating a first clock signal at four times the chrominance subcarrier frequency; first circuit means clocked by said first clock signal for processing an analog composite color signal to provide digital first color difference signals and digital second color difference signals; second circuit means for digitally synchronizing said chrominance subcarrier oscillator with the burst contained in said color signal, said second circuit means comprising: first means for accumulating said digital first color difference signals during a keying pulse which is identical in duration to the duration of said burst to provide a first accumulated digital output signal; second means for accumulating said digital second color difference signals during said keying pulse to provide a second accumulated digital output signal; means for arithmetically combining said first accumulated digital output signal; with second digital signals to provide modified digital output signals; means for limiting the digital value of said modified digital output signals to provide intermediate digital control signals; means for providing digital control signals in response to said intermediate control signals, the sign bit of said first accumulated digital output signal, and said second accumulated digital output signal; and means responsive to said digital control signals for supplying said control signals to said chrominance subcarrier oscillator.
Claim 2
Dependent Claim
214 words
Color television circuitry comprising: a chrominance subcarrier oscillator for generating a first clock signal at four times the chrominance subcarrier frequency; first circuit means clocked by said first clock signal for processing an analog composite color signal to provide digital first color difference signals and digital second color difference signals; second circuit means for digitally synchronizing said chrominance subcarrier oscillator with the burst contained in said color signal, said second circuit means comprising: first means for accumulating said digital first color difference signals during a keying pulse which is identical in duration to the duration of said burst to provide a first accumulated digital output signal; second means for accumulating said digital second color difference signals during said keying pulse to provide a second accumulated digital output signal; means for arithmetically combining said first accumulated digital output signal; with second digital signals to provide modified digital output signals; means for limiting the digital value of said modified digital output signals to provide intermediate digital control signals; means for providing digital control signals in response to said intermediate control signals, the sign bit of said first accumulated digital output signal, and said second accumulated digital output signal; and means responsive to said digital control signals for supplying said control signals to said chrominance subcarrier oscillator.
Claim 3
Dependent Claim
18 words
Color television circuitry in accordance with claim 1 wherein: said second digital signal represents a predetermined constant value.
Claim 4
Dependent Claim
19 words
Color television circuitry in accordance with claim 1 wherein: said second digital signal is a digital tint control signal.
Claim 5
Dependent Claim
27 words
Color television circuitry in accordance with claim 1 comprising: a memory for storing said second digital signal and providing said second digital signal to said combining means.
Claim 6
Dependent Claim
50 words
Color television circuitry in accordance with claim 1 wherein: said chrominance subcarrier oscillator comprises, a voltage controlled oscillator; and said supplying means comprises a digital to analog convertor having digital inputs coupled to said providing means and an analog output for supplying the control voltage to said voltage controlled oscillator.
Claim 7
Dependent Claim
25 words
Color television circuitry in accordance with claim 5 comprising; a digital low pass filter coupled between said providing means and said digital to analog convertor.
Claim 8
Dependent Claim
26 words
Color television circuitry in accordance with claim 5 comprising; an analog low pass filter for coupling said digital to analog convertor to said voltage controlled oscillator.
Claim 9
Dependent Claim
98 words
Color television circuitry in accordance with claim 1 wherein: said chrominance subcarrier oscillator generates second and third clock signals each of the frequency of said chrominance subcarrier frequency and having a predetermined phase relationship to each other; said first accumulating means being responsive to said third clock signal for accumulating said digital first color difference signals during coincidence of said keying pulse and said third clock signals; and said second accumulating means being responsive to said second clock signal for accumulating said digital second color difference signals during coincidence of said keying pulse and said second clock signals.
Claim 10
Dependent Claim
23 words
Color television circuitry in accordance with claim 8 wherein: said third clock signal leads said second clock signal by 90 degrees in phase.
Claim 11
Dependent Claim
32 words
Color television circuitry in accordance with claim 9 wherein: said digital first color difference signal is a digital red-minus-luminance signal, and said digital second color difference signal is a digital blue-minus-luminance signal.
Claim 12
Dependent Claim
95 words
Color television circuitry in accordance with claim 8 wherein: said first accumulating means comprises: a first adder having a first addened input receiving said digital first color difference signals, a second addeded input and a sum output; first memory means having an input coupled to said sum output and an output coupled to said second addened input; and second memory means having inputs coupled to said first memory means output for storing said first accumulated digital output signals and having outputs coupled to said combining means for supplying said first accumulated digital output signals thereto.
Claim 13
Dependent Claim
91 words
Color television circuitry in accordance with claim 11 wherein: said second accumulating means comprises: a second adder having a first addened input receiving said digital second color difference signals, a second addened input and a sum output; third memory means having an input coupled to said second adder sum output and an output coupled to said second adder second addened input; and fourth memory means having inputs coupled to said third memory means output for storing said second accumulated digital output signals and having an output coupled to said providing means.
Claim 14
Dependent Claim
101 words
Color television circuitry in accordance with claim 12 wherein: signals at said output of said first adder are stored in said first memory means during coincidence of said keying pulse and said third clock signal, and signals stored in said first memory means are transferred to said second memory means subsequent to said keying pulse; and signals at said output of said second adder are stored in said third memory means during coincidence of said keying pulse and said second clock signal; and signals stored in said third memory are transferred to said fourth memory means subsequent to said keying pulse.
Claim 15
Dependent Claim
32 words
Color television circuitry in accordance with claim 13 wherein: said digital first color difference signal is a digital red-minus-luminance signal, and said digital second color difference signal is a digital blue-minus-luminance signal.
Claim 16
Dependent Claim
95 words
Color television circuitry in accordance with claim 1 wherein: said providing means provides said intermediate control signals as said digital control signals where said sign bit of said first accumulated digital output signal and the sign bit of said second accumulated digital output signal have a first predetermined relationship, said providing means providing first predetermined signals or second predetermined signals as said digital control signals when said sign bit of said first accumulated digital output signal and said sign bit of said second accumulated digital output signal have a second or third predetermined relationship, respectively.
Claim 17
Dependent Claim
32 words
Color television circuitry in accordance with claim 15 wherein: said digital first color difference signal is a digital red-minus-luminance signal, and said digital second color difference signal is a digital blue-minus-luminance signal.
References Cited (Backward Citations)
US4251831A
Cited
US4352123A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-01-01 | 1988-07-02 | 1989-01-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-01-01 | 1992-07-02 | 1993-01-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-01-01 | 1996-07-02 | 1997-01-01 | $7700.00 | Window Closed / Lapsed |