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US4488211A Expired / Lapsed US ⏱️ 0.0 years remaining

Harmonic and pulsation reducing circuit used in a multiplex polyphase rectifier circuit

Assignee: Individual
•
Filing: 1982-08-17
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Granted: 1984-12-11
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Expires: 2002-08-17
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Abstract

Abstract A harmonic and pulsation reducing circuit used in multiplex polyphase rectifier circuits such as a multiplex polyphase rectifier, a branch reactor, an external commutated invertor, etc. which is characterized in that a rectifier circuit to rectify the induced voltage of a secondary winding provided at interphase reactors interposed between other plural rectifier circuits is connected between the center of the interphase reactors and loads or a DC power source so that the rectified voltage may be superposed on the DC output voltage of the said plural rectifier circuits or the other DC power source.

Inventors

  • 👤 Shota Miyairi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 05:27
CPC Classifications
H; H02; H02M; H02M5/00; H02M5/40; H02M5/42; H02M5/44; H02M5/443; H02M5/45; H02M5/4505

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 104 words
In a multiplex polyphase rectifier circuit including an interphase reactor and a plurality of rectifier circuits, a harmonic and pulsation reducing circuit comprising a secondary winding associated with said interphase reactor, and an additional rectifier circuit rectifying the voltage induced in said secondary winding, said harmonic and pulsation reducing circuit being connected between a central point of said interphase reactor and a load in such a relation that said secondary winding is connected in series with said load, whereby the voltage obtained as a result of rectification of said induced voltage is superposed on the DC output voltage of said multiplex polyphase rectifier circuit.
Claim 2
Dependent Claim 104 words
In a multiplex polyphase rectifier circuit including an interphase reactor and a plurality of rectifier circuits, a harmonic and pulsation reducing circuit comprising a secondary winding associated with said interphase reactor, and an additional rectifier circuit rectifying the voltage induced in said secondary winding, said harmonic and pulsation reducing circuit being connected between a central point of said interphase reactor and a load in such a relation that said secondary winding is connected in series with said load, whereby the voltage obtained as a result of rectification of said induced voltage is superposed on the DC output voltage of said multiplex polyphase rectifier circuit.
Claim 3
Dependent Claim 37 words
A harmonic and pulsation reducing circuit as claimed in claim 1, wherein said plurality of rectifier circuits are constituted by thyristors, and said additional rectifier circuit is in the form of a hybrid bridge full-wave rectifier circuit.
Claim 4
Dependent Claim 110 words
In an external commutated inverter including an interphase reactor and a plurality of rectifier circuits constituted by thyristors, a harmonic and pulsation reducing circuit comprising a secondary winding associated with the said interphase reactor, and an additional rectifier circuit rectifying the voltage induced in said secondary winding, said harmonic and pulsation reducing circuit being connected between a central point of said interphase reactor and a DC power source in such a relation that said secondary winding is connected in series with said DC power source, whereby the voltage obtained as a result of rectification of said induced voltage is superposed on the DC output voltage of said DC power source.
Claim 5
Dependent Claim 110 words
In an external commutated inverter including an interphase reactor and a plurality of rectifier circuits constituted by thyristors, a harmonic and pulsation reducing circuit comprising a secondary winding associated with the said interphase reactor, and an additional rectifier circuit rectifying the voltage induced in said secondary winding, said harmonic and pulsation reducing circuit being connected between a central point of said interphase reactor and a DC power source in such a relation that said secondary winding is connected in series with said DC power source, whereby the voltage obtained as a result of rectification of said induced voltage is superposed on the DC output voltage of said DC power source.

References Cited (Backward Citations)

US2082015A Cited
US2759140A Cited
US3308368A Cited
US4366532A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-12-11 1988-06-11 1988-12-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-12-11 1992-06-11 1992-12-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-12-11 1996-06-11 1996-12-11 $7700.00 Window Closed / Lapsed

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