US4486881A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Device for real-time correction of errors in data recorded on a magnetic medium
Assignee: Thales SA
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Filing: 1981-06-17
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Granted: 1984-12-04
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Expires: 2001-06-17
Abstract
Abstract The error-correcting device for processing data in parallel on a plurality of tracks provides two levels of correction on the basis of redundancy bits added to the transmitted data, namely bits resulting from coding in blocks of serial data on each channel by means of a shortened Fire code (200, 180), and parity bits each relating to one-half of the parallel tracks. An array of decoders delivers the data corrected on the basis of the bits resulting from the Fire code which are substituted when necessary for the data stored in a memory. When the errors in a block of one of the tracks are too long to be corrected in this manner, two parity computers associated with multiplexers permit determination of the erroneous bits.
Inventors
- 👤 Tristan de Couasnon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 23:04
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/13; H03M13/17; H03M13/175; G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1813; H03M13/29; H03M13/2906
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
141 words
A device for encoding data to provide redundancy bits and parity bits on data recorded on a multitrack medium comprising: means for processing data in the form of a sequence of data by dividing said sequence into a plurality of parallel data blocks each to be recorded on a track of said medium and each bit of said blocks having a corresponding parallel bit on the other tracks; first means for coding on at least one of said tracks a sequence of parity bits in sequential blocks produced by operation on the corresponding parallel bits to be recorded on tracks as blocks; and second means for coding each of data blocks and said blocks of parity bits with a plurality of n serial redundancy bits in the form of the shortened Fire code type in each block of N serial bits.
Claim 2
Independent Claim
141 words
A device for encoding data to provide redundancy bits and parity bits on data recorded on a multitrack medium comprising: means for processing data in the form of a sequence of data by dividing said sequence into a plurality of parallel data blocks each to be recorded on a track of said medium and each bit of said blocks having a corresponding parallel bit on the other tracks; first means for coding on at least one of said tracks a sequence of parity bits in sequential blocks produced by operation on the corresponding parallel bits to be recorded on tracks as blocks; and second means for coding each of data blocks and said blocks of parity bits with a plurality of n serial redundancy bits in the form of the shortened Fire code type in each block of N serial bits.
Claim 3
Dependent Claim
35 words
A device as in claim 1 wherein said first coding means includes means for coding sequences of parity bits on each of first and second tracks, each corresponding to one group of data block sequences.
Claim 4
Dependent Claim
26 words
A device as in claim 1 wherein said Fire code is shortened to (200, 180) N being equal to 180 and n being equal to 20.
Claim 5
Dependent Claim
54 words
A device as in claim 1 wherein said processing means includes means for multiplexing the data to be recorded in order to a number of said sequences of parallel data blocks on k tracks and wherein said first coding means includes k elementary coders for each computing the redundancy bits for each data block.
Claim 6
Dependent Claim
20 words
A device as in claim 4 including means for reading said data blocks on said tracks and restituting said data.
Claim 7
Dependent Claim
68 words
A device according to claim 5 wherein, for coding in accordance with a Fire code, each elementary coder comprises a circuit for dividing by the generating polynomial of the Fire code g(x)=x 20 +x 16 +x 13 +x 7 +x 3 +1 for receiving a sequence of bits on its input and delivering on its output the twenty redundancy bits transmitted in succession to each serial data block.
Claim 8
Dependent Claim
127 words
A device according to claim 4 or claim 6, wherein said processing means comprises two circuits for receiving the restituted data, said two circuits being constituted by a decoding circuit composed of k elementary decoders and by a memory circuit, a correction circuit for receiving the data which are present on the outputs of the decoding circuit and the data which are present on the outputs of the memory circuit in order to correct the short burst errors, a logic circuit for detecting long burst errors, a circuit for correcting long burst errors comprising parity computers and multiplexers, the outputs of said correcting circuit being connected to the inputs of a multiplexing circuit comprising registers and a multiplexer for delivering the corrected data to an output register.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-12-04 | 1988-06-04 | 1988-12-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-12-04 | 1992-06-04 | 1992-12-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-12-04 | 1996-06-04 | 1996-12-04 | $7700.00 | Window Closed / Lapsed |