US4485337A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Servo data driven motor speed control
Assignee: Seagate Technology LLC
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Filing: 1983-05-09
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Granted: 1984-11-27
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Expires: 2003-05-09
Abstract
Abstract A digital motor speed control for a disk drive which is speed regulated by servo data retrieved from the disk drive's servo disk.
Inventors
- 👤 Randall L. Sandusky
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 23:09
CPC Classifications
G; G11; G11B; G11B19/00; G11B19/20; G11B19/28; H; H02; H02P; H02P23/00; H02P23/22; Y; Y10; Y10S; Y10S388/00; Y10S388/90; Y10S388/902; Y10S388/907; Y10S388/912
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
189 words
A motor speed control comprising: a motor; means for generating feedback signals responsive to the speed of rotation of said motor; a reference speed indicating means; an up/down counter means; feedback signal counter means for counting said feedback signals and for resetting to a count of zero on reaching a first predetermined count; means responsive to said feedback signal counter means and to said reference speed indicating means for incrementing or decrementing said up/down counter depending on whether the speed of rotation of said motor is too fast or two slow; decode means responsive to said feedback signal counter means for outputting a predetermined number of decode signals, each signal indicative of the count in said feedback signal counter means reaching a predetermined one of a corresponding number of counts; multiplexer means responsive to the count of said up/down counter for selecting one of said predetermined decode signals; and duty cycle latch means responsive to the logical rise of the selected signal for enabling power application to said motor and further responsive to a predetermined count of said feedback signal counter means for disabling power application to said motor.
Claim 2
Dependent Claim
189 words
A motor speed control comprising: a motor; means for generating feedback signals responsive to the speed of rotation of said motor; a reference speed indicating means; an up/down counter means; feedback signal counter means for counting said feedback signals and for resetting to a count of zero on reaching a first predetermined count; means responsive to said feedback signal counter means and to said reference speed indicating means for incrementing or decrementing said up/down counter depending on whether the speed of rotation of said motor is too fast or two slow; decode means responsive to said feedback signal counter means for outputting a predetermined number of decode signals, each signal indicative of the count in said feedback signal counter means reaching a predetermined one of a corresponding number of counts; multiplexer means responsive to the count of said up/down counter for selecting one of said predetermined decode signals; and duty cycle latch means responsive to the logical rise of the selected signal for enabling power application to said motor and further responsive to a predetermined count of said feedback signal counter means for disabling power application to said motor.
Claim 3
Dependent Claim
22 words
The speed control of claim 1 wherein said means for generating feedback signals comprises means for recovering servo data from a disk.
Claim 4
Dependent Claim
17 words
The speed control of claim 1 wherein said reference speed indicating means comprises a reference oscillator means.
Claim 5
Dependent Claim
25 words
The speed control of claim 2 wherein said servo data includes sync dibits and said feedback signals are output upon detection of said sync dibits.
Claim 6
Dependent Claim
33 words
The speed control of claim 3 wherein said means responsive to said feedback signal counter means includes means for comparing the frequency of said feedback signals to the frequency of said reference oscillator.
Claim 7
Dependent Claim
32 words
The speed control of claim 5 wherein said means responsive to said feedback signal counter means includes means for incrementing or decrementing said up/down counter means responsive to said means for comparing.
Claim 8
Dependent Claim
21 words
The speed control of claim 6 wherein said up/down counter means includes means for holding on reaching maximum or minimum count.
Claim 9
Dependent Claim
48 words
The speed control of claim 4 wherein said feedback signal counter means includes means for generating a most significant bit signal on counting a predetermined number of said feedback signals; said means for incrementing or decrementing said up/down counter means being responsive to said most significant bit signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-27 | 1988-05-28 | 1988-11-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-27 | 1992-05-28 | 1992-11-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-27 | 1996-05-28 | 1996-11-27 | $7700.00 | Window Closed / Lapsed |