← Back to Patent Explorer
US4484269A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for providing measurement of central processing unit activity

Assignee: Bull HN Information Systems Inc
•
Filing: 1982-05-05
•
Granted: 1984-11-20
•
Expires: 2002-05-05
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Apparatus and method for measurement of the activity of a central processing unit of a data processing system resulting from the execution of a program or series of programs. A value is initially entered in an arithmetic circuit. Each time an instruction is executed, a quantity related to the amount of activity required to execute the instruction is decremented from the arithmetic circuit. When value in the arithmetic circuit reaches zero, the operating system is notified and a decision whether to continue the program or initiate some other activity in the data processing unit is made. The usage of the machine is therefore determined by the number of times the arithmetic circuit has reached zero during the execution of a program and by the quantity remaining in the arithmetic circuit when execution of the program is complete. Provision is made for other measurement modes such as decrementing the quantity in the arithmetic circuit by a clock.

Inventors

  • 👤 John B. Crain

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 17:59
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/30; G06F11/34; G06F11/3409; G06F11/3419; G06F11/3423

Claims Analysis

Total Claims: 24
Claim 1
Independent Claim 101 words
Apparatus for measuring the usage of a central processing unit resulting from execution of an instruction, said apparatus comprising: register means for storing a predetermined numerical value signal; memory means for storing a plurality of weighting factor signals correlated to a portion of each of a plurality of instruction signals; means responsive to signals representing said portion of an instruction being executed for extracting the correlated weighting factor signal from said memory; and decrementing means coupled to said memory means and said register means for decrementing said numerical value signal by an amount commensurate with said extracted correlated weighting factor signal.
Claim 2
Dependent Claim 101 words
Apparatus for measuring the usage of a central processing unit resulting from execution of an instruction, said apparatus comprising: register means for storing a predetermined numerical value signal; memory means for storing a plurality of weighting factor signals correlated to a portion of each of a plurality of instruction signals; means responsive to signals representing said portion of an instruction being executed for extracting the correlated weighting factor signal from said memory; and decrementing means coupled to said memory means and said register means for decrementing said numerical value signal by an amount commensurate with said extracted correlated weighting factor signal.
Claim 3
Dependent Claim 31 words
The usage measuring apparatus of claim 1 including an oscillator means, and selectively operable means coupling said oscillator means to said decrementing means for selectively decrementing said numerical value signals periodically.
Claim 4
Dependent Claim 62 words
The usage measuring apparatus of claim 1 further including signal means for selectively decrementing said numerical value signals in said register means by constant value signals and further including a selectively actuated switch means coupling said signal means to said decrementing means, said switch means being actuated to couple said signal means to said decrementing means when said memory means is deactivated.
Claim 5
Dependent Claim 160 words
Apparatus for measuring the usage of a central processor unit resulting from an execution of a series of instructions, said apparatus comprising: memory means for storing a plurality of signals correlated, respectively, with individual ones of said instructions and representative of the relative activity of said central processing unit for each of said instructions; means responsive to signals representing a portion of each of said instructions for extracting from said memory means the one of said signals associated with the instruction being executed; accumulation means coupled to said memory means for accumulating said signals extracted from said memory in response to execution of each of said instructions; oscillator means for providing periodic, time-based signals; mode control means selectively coupling said oscillator means and said memory means to said accumulation means whereby in one mode said accumulation means accumulates said extracted signals representative of the activity of said central processor, and in another mode said accumulation means accumulates said time-based signals.
Claim 6
Dependent Claim 160 words
Apparatus for measuring the usage of a central processor unit resulting from an execution of a series of instructions, said apparatus comprising: memory means for storing a plurality of signals correlated, respectively, with individual ones of said instructions and representative of the relative activity of said central processing unit for each of said instructions; means responsive to signals representing a portion of each of said instructions for extracting from said memory means the one of said signals associated with the instruction being executed; accumulation means coupled to said memory means for accumulating said signals extracted from said memory in response to execution of each of said instructions; oscillator means for providing periodic, time-based signals; mode control means selectively coupling said oscillator means and said memory means to said accumulation means whereby in one mode said accumulation means accumulates said extracted signals representative of the activity of said central processor, and in another mode said accumulation means accumulates said time-based signals.
Claim 7
Dependent Claim 152 words
Apparatus for measuring the usage of a data processing unit resulting from an execution of a series of instructions comprising: memory means for providing a selected group of signals in response to application of a portion of each of said instructions to said memory means; means for storing a numerical value; adder means coupled to said memory means and responsive to an execution of each of said instructions for changing said numerical value by an amount represented by a particular one of said groups of signals, said particular one group determined by said instruction being executed; oscillator means coupled to said means for storing a numerical value, said oscillator means activated when said memory means is not activated, said oscillator means changing said numerical value periodically by a constant amount; and analyzing means coupled to said means for storing a numerical value for providing a signal when a predetermined value is reached.
Claim 8
Dependent Claim 152 words
Apparatus for measuring the usage of a data processing unit resulting from an execution of a series of instructions comprising: memory means for providing a selected group of signals in response to application of a portion of each of said instructions to said memory means; means for storing a numerical value; adder means coupled to said memory means and responsive to an execution of each of said instructions for changing said numerical value by an amount represented by a particular one of said groups of signals, said particular one group determined by said instruction being executed; oscillator means coupled to said means for storing a numerical value, said oscillator means activated when said memory means is not activated, said oscillator means changing said numerical value periodically by a constant amount; and analyzing means coupled to said means for storing a numerical value for providing a signal when a predetermined value is reached.
Claim 9
Dependent Claim 106 words
Apparatus for measuring the activity of a central processing unit resulting from the execution of a series of instructions, comprising: memory means for storing groups of signals representing values related to central processing unit activity required for execution of each instruction, said memory means applying a predetermined one of said groups of signals to output terminals in response to application of at least a portion of said related instructions to said memory means; means coupled to said memory means for accumulating each of said predetermined one group of signals; and analyzing means for determing when the groups of signals in said accumulation means equal pre-established value.
Claim 10
Dependent Claim 106 words
Apparatus for measuring the activity of a central processing unit resulting from the execution of a series of instructions, comprising: memory means for storing groups of signals representing values related to central processing unit activity required for execution of each instruction, said memory means applying a predetermined one of said groups of signals to output terminals in response to application of at least a portion of said related instructions to said memory means; means coupled to said memory means for accumulating each of said predetermined one group of signals; and analyzing means for determing when the groups of signals in said accumulation means equal pre-established value.
Claim 11
Dependent Claim 38 words
The measurement apparatus of claim 6 further including apparatus for generating periodic signals coupled to said accumulating means, said accumulating means selectively accumulating said periodic signals when said group of signals are not applied from said memory means.
Claim 12
Dependent Claim 70 words
The measurement apparatus of claim 6 further including a second memory means for storing second groups of signals related to central processing unit activity required for execution of each of a second group of instructions, said second memory means applying a predetermined one of said second group of signals to output terminals in response to application of at least a portion of said related second instructions to said memory means.
Claim 13
Dependent Claim 80 words
Apparatus of measuring performance of a central processing unit in the execution of a series of program instructions comprising: memory means having address associated numeric values representative of individual ones of said program instructions said values being addressable for extraction in response to execution of each of said program instructions; arithmetic means for storing a total numeric value; and adder means coupled to said memory means and said arithmetic means for changing said total numeric value by said numeric value.
Claim 14
Dependent Claim 80 words
Apparatus of measuring performance of a central processing unit in the execution of a series of program instructions comprising: memory means having address associated numeric values representative of individual ones of said program instructions said values being addressable for extraction in response to execution of each of said program instructions; arithmetic means for storing a total numeric value; and adder means coupled to said memory means and said arithmetic means for changing said total numeric value by said numeric value.
Claim 15
Dependent Claim 27 words
The performance measuring apparatus of claim 9 further including analyzing means coupled to said arithmetic means for determining when said total numeric value reaches a predetermined value.
Claim 16
Dependent Claim 35 words
The performance measurement apparatus of claim 9 further including second memory means, said second memory means generating a second numeric value in response to execution of each of a selected group of said program instructions.
Claim 17
Dependent Claim 41 words
The performance measurement apparatus of claim 8 further including pulse generating means for generating periodic signals, said pulse generating means coupled to said arithmetic means, said arithmetic means incrementing said total numeric value in response to each of said periodic signals.
Claim 18
Dependent Claim 142 words
Apparatus for measurement of the activity of a data processing unit required for execution of a sequence of instructions, wherein the activity of a data processing unit in the execution of each instruction is known, comprising: memory means for storing signals representing values which correspond to known data processing activity for each instruction, said memory means being responsive to execution of each instruction for generating the value signals corresponding to the instruction being executed; circuit means for storing a resulting group of signals, said circuit means including apparatus responsive to said data processing unit for loading an initial resulting group of signals into said circuit means; combining means for combining a portion of said resulting group of signals with said value signals; and analyzing circuit coupled to said combining means for determining when said resulting group of signals is a predetermined value.
Claim 19
Dependent Claim 142 words
Apparatus for measurement of the activity of a data processing unit required for execution of a sequence of instructions, wherein the activity of a data processing unit in the execution of each instruction is known, comprising: memory means for storing signals representing values which correspond to known data processing activity for each instruction, said memory means being responsive to execution of each instruction for generating the value signals corresponding to the instruction being executed; circuit means for storing a resulting group of signals, said circuit means including apparatus responsive to said data processing unit for loading an initial resulting group of signals into said circuit means; combining means for combining a portion of said resulting group of signals with said value signals; and analyzing circuit coupled to said combining means for determining when said resulting group of signals is a predetermined value.
Claim 20
Dependent Claim 32 words
The activity measurement apparatus of claim 13 further including second memory means, said second memory means generating a second group of to value signals for combining with said resulting group of signals.
Claim 21
Dependent Claim 37 words
The activity measurement apparatus of claim 13 wherein said circuit means includes a first and a second portion, said first portion containing a portion of said resulting group of signals for combining with said instruction execution activity.
Claim 22
Dependent Claim 92 words
Apparatus for measurement of activity of a data processing system to execute a series of instructions including: circuit means for storing a numerical value; memory means for storing execution numerical values, said execution numerical values determined by activity of a data processing unit for a related instruction; combining apparatus responsive to execution of an instruction for changing said numerical value related to instruction being executed to produce a resultant value; and analyzing apparatus coupled to said circuit means for producing a signal when said resultant value is changed by a predetermined amount.
Claim 23
Dependent Claim 92 words
Apparatus for measurement of activity of a data processing system to execute a series of instructions including: circuit means for storing a numerical value; memory means for storing execution numerical values, said execution numerical values determined by activity of a data processing unit for a related instruction; combining apparatus responsive to execution of an instruction for changing said numerical value related to instruction being executed to produce a resultant value; and analyzing apparatus coupled to said circuit means for producing a signal when said resultant value is changed by a predetermined amount.
Claim 24
Dependent Claim 26 words
The activity measurement apparatus of claim 16 further including clock means coupled to said circuit means for periodically changing said resultant value by a constant amount.

References Cited (Backward Citations)

US4183083A Cited
US4090239A Cited
US4166290A Cited
US4387427A Cited
US4369493A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-11-20 1988-05-21 1988-11-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-11-20 1992-05-21 1992-11-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-11-20 1996-05-21 1996-11-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag