US4484212A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Toshiba Corp
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Filing: 1981-12-29
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Granted: 1984-11-20
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Expires: 2001-12-29
Abstract
Abstract A semiconductor device comprising a semiconductor substrate having at least two resistor elements, wherein said resistor elements have a specific resistance ratio relative to each other, an insulation layer formed on a major surface of said semiconductor substrate, a circuit wiring layer formed on said insulation layer covering a portion of said insulation layer which corresponds to at least one of said resistor elements, and a dummy wiring layer made of the same material as that of the circuit wiring layer and formed on the insulation layer covering that portion of said insulation layer which corresponds to the resistor element or elements not covered by said circuit wiring layer, and where the ratio of an overlapping area of one resistor element in said circuit wiring layer and an overlapping area of the other resistor element and said dummy wiring layer is equal to a resistance ratio of said resistor elements.
Inventors
- 👤 Shigeru Komatsu
- 👤 Michio Nakamura
- 👤 Katsuji Fujita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 14:50
CPC Classifications
H; H10; H10W; H10W42/00; H10D; H10D84/00; H10D84/201; H10D84/204; H10D84/209; H10W20/00; H10W20/40; Y; Y10; Y10S; Y10S257/00; Y10S257/925; Y10S73/00; Y10S73/04
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
142 words
A semiconductor device comprising: a semiconductor substrate having at least two resistor elements formed therein, wherein said resistor elements formed therein have a specific resistance ratio relative to each other; an insulation layer formed on a major surface of said semiconductor substrate; a circuit wiring layer formed on said insulation layer, covering a portion of said insulation layer which corresponds to at least one of said resistor elements; and a dummy wiring layer formed on said insulation layer, covering that portion of said insulation layer which corresponds to the resistor element or elements not covered by said circuit wiring layer, and wherein said circuit wiring layer causes less stress on said resistance element not covered by said circuit wiring layer than on said resistance element covered by said circuit wiring layer, said resistance ratio of said resistance elements formed therein being stress-dependent.
Claim 2
Dependent Claim
142 words
A semiconductor device comprising: a semiconductor substrate having at least two resistor elements formed therein, wherein said resistor elements formed therein have a specific resistance ratio relative to each other; an insulation layer formed on a major surface of said semiconductor substrate; a circuit wiring layer formed on said insulation layer, covering a portion of said insulation layer which corresponds to at least one of said resistor elements; and a dummy wiring layer formed on said insulation layer, covering that portion of said insulation layer which corresponds to the resistor element or elements not covered by said circuit wiring layer, and wherein said circuit wiring layer causes less stress on said resistance element not covered by said circuit wiring layer than on said resistance element covered by said circuit wiring layer, said resistance ratio of said resistance elements formed therein being stress-dependent.
Claim 3
Dependent Claim
57 words
A semiconductor device according to claim 1, wherein said circuit wiring layer covers a portion of said insulation layer which corresponds to one of said two resistor elements; and said dummy wiring layer covers a portion of said insulation layer which corresponds to the other of said two resistor elements not covered by said circuit wiring layer.
Claim 4
Dependent Claim
58 words
A semiconductor device according to claim 2, wherein a ratio of an overlapping area of said resistor element and said circuit wiring layer and an overlapping area of said other resistor element and said dummy wiring layer is equal to a ratio of a resistance value of said one resistor element and that of said other resistor element.
Claim 5
Dependent Claim
81 words
A semiconductor device according to claim 1, wherein a ratio of an overlapping area of said resistor element covered by said dummy wiring layer and said dummy wiring layer and an overlapping area of said resistor element covered by said circuit wiring layer and said circuit wiring layer is equal to a ratio of a resistance value of said resistor element covered by said dummy wiring layer and said resistance value of said resistor element covered by said circuit wiring layer.
Claim 6
Dependent Claim
27 words
A semiconductor device according to claims 1, 2, 3 or 4, wherein said circuit wiring layer and said dummy wiring layer are made of the same material.
Claim 7
Dependent Claim
14 words
A semiconductor device according to claim 5, wherein said material is corrosion resistive alloy.
Claim 8
Dependent Claim
15 words
A semiconductor device according to claim 5, wherein said material is a poly crystal silicon.
Claim 9
Dependent Claim
13 words
A semiconductor device according to claim 5, wherein said material is metal silicide.
Claim 10
Dependent Claim
28 words
A semiconductor device according to claim 6, wherein said corrosion resistive alloy is one selected from Al - Si - Cu, Al - Si and Al - Ti.
Claim 11
Dependent Claim
161 words
A semiconductor device of the multilayer type comprising: a semiconductor substrate having at least two resistor elements formed therein, wherein said resistor elements formed therein have a specific resistance ratio relative to each other; a multi-layer arrangement of insulation layer-conductive wiring layer in which insulation layers and conductive wiring layers are alternately superimposed in this order on a major surface of said semiconductor substrate; said conductive wiring layer including a circuit wiring layer and a dummy wiring layer; said circuit wiring layer being formed to cover one of said two resistor elements on the lower side of said insulation layer; and said dummy wiring layer being formed to cover said resistor element not covered by said circuit wiring layer and wherein said circuit wiring layer causes less stress on said resistance element not covered by said circuit wiring layer than on said resistance element covered by said circuit wiring layer, said resistance ratio of said resistance elements formed therein being stress-dependent.
Claim 12
Dependent Claim
161 words
A semiconductor device of the multilayer type comprising: a semiconductor substrate having at least two resistor elements formed therein, wherein said resistor elements formed therein have a specific resistance ratio relative to each other; a multi-layer arrangement of insulation layer-conductive wiring layer in which insulation layers and conductive wiring layers are alternately superimposed in this order on a major surface of said semiconductor substrate; said conductive wiring layer including a circuit wiring layer and a dummy wiring layer; said circuit wiring layer being formed to cover one of said two resistor elements on the lower side of said insulation layer; and said dummy wiring layer being formed to cover said resistor element not covered by said circuit wiring layer and wherein said circuit wiring layer causes less stress on said resistance element not covered by said circuit wiring layer than on said resistance element covered by said circuit wiring layer, said resistance ratio of said resistance elements formed therein being stress-dependent.
Claim 13
Dependent Claim
57 words
A semiconductor device according to claim 10, wherein said circuit wiring layer covers a portion of said insulation layer which corresponds to one of said two resistor elements; and said dummy wiring layer covers a portion of said insulation layer which corresponds to the other of said two resistor elements not covered by said circuit wiring layer.
Claim 14
Dependent Claim
59 words
A semiconductor device according to claim 11, wherein a ratio of an overlapping area of said one resistor element and said circuit wiring layer and an overlapping area of said other resistor element and said dummy wiring layer is equal to a ratio of a resistance value of said one resistor element and that of said other resistor element.
Claim 15
Dependent Claim
81 words
A semiconductor device according to claim 10, wherein a ratio of an overlapping area of said resistor element covered by said dummy wiring layer and said dummy wiring layer and an overlapping area of said resistor element covered by said circuit wiring layer and said circuit wiring layer is equal to a ratio of a resistance value of said resistor element covered by said dummy wiring layer and said resistance value of said resistor element covered by said circuit wiring layer.
Claim 16
Dependent Claim
27 words
A semiconductor device according to claims 10, 11, 12 or 13, wherein said circuit wiring layer and said dummy wiring layer are made of the same material.
Claim 17
Dependent Claim
14 words
A semiconductor device according to claim 14, wherein said material is corrosion resistive alloy.
Claim 18
Dependent Claim
15 words
A semiconductor device according to claim 14, wherein said material is a poly crystal silicon.
Claim 19
Dependent Claim
13 words
A semiconductor device according to claim 14, wherein said material is metal silicide.
Claim 20
Dependent Claim
28 words
A semiconductor device according to claim 15, wherein said corrosion resistive alloy is one selected from Al - Si - Cu, Al - Si and Al - Ti.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-20 | 1988-05-21 | 1988-11-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-20 | 1992-05-21 | 1992-11-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-20 | 1996-05-21 | 1996-11-20 | $7700.00 | Window Closed / Lapsed |