US4484153A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage converter for a frequency synthesizer
Assignee: Motorola Solutions Inc
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Filing: 1981-04-06
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Granted: 1984-11-20
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Expires: 2001-04-06
Abstract
Abstract In a frequency synthesizer phase locked loop including a reference oscillator, a variable reference divider (÷M), a sample and hold phase detector, a loop filter, a voltage controlled oscillator and a variable divider (÷N), a voltage converter for controlling the voltage of a control input to the voltage controlled oscillator is disclosed. In the preferred embodiment, the voltage converter has its input connected to the output of a first reference divider in the variable reference divider (÷M) and its output connected to a control input (varactor diode) of the voltage controlled oscillator. The voltage converter clamps the divider reference signal from the first reference divider and provides a negative voltage level output to bias the varactor diode of the voltage controlled oscillator. Thus, the tuning range of the frequency synthesizer is increased.
Inventors
- 👤 Jaime A. Borras
- 👤 Ruben J. Gonzalez
- 👤 Daniel M. Smith
- 👤 Jose I. Suarez
- 👤 Alan M. Victor
- 👤 Alfred B. Wieczorek
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 21:22
CPC Classifications
H; H03; H03K; H03K21/00; H03K21/38; H03C; H03C3/00; H03C3/02; H03C3/09; H03C3/0908; H03C3/0916; H03C3/0933; H03C3/0941; H03C3/0958; H03C3/0966; H03C3/10; H03C3/12; H03C3/22; H03C3/227; H03D; H03D13/00; H03D13/005; H03J; H03J5/00; H03J5/02; H03J5/0245; H03J5/0272; H03J5/0281; H03K23/00; H03K23/64; H03K23/66; H03K23/667; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/0802; H03L7/16; H03L7/18; H03L7/183; H03L7/193; H03L7/197; H03L7/199; H04; H04B; H04B1/00; H04B1/38; H04B1/40; H04B1/403; H04B1/405
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
159 words
In a phase locked loop for a frequency synthesizer, said phase locked loop including a reference oscillator for generating a reference signal, a first divider for dividing said reference signal and generating at least one divided reference signal, a voltage controlled oscillator (VCO) having a control input, a second divider for dividing a VCO output signal, a phase detector for monitoring said divided VCO output signal and said divided reference signal and generating a first control signal to said control input of said VCO, a voltage converter, comprising: circuit means, having an input connected to said first divider and an output connected to said control input of said VCO, for monitoring the voltage level of said divided reference signal and converting said voltage level into a second control signal which is directed to said control input of said VCO, whereby the potential across said control input of said VCO is increased, thereby increasing the tuning range of said VCO.
Claim 2
Dependent Claim
159 words
In a phase locked loop for a frequency synthesizer, said phase locked loop including a reference oscillator for generating a reference signal, a first divider for dividing said reference signal and generating at least one divided reference signal, a voltage controlled oscillator (VCO) having a control input, a second divider for dividing a VCO output signal, a phase detector for monitoring said divided VCO output signal and said divided reference signal and generating a first control signal to said control input of said VCO, a voltage converter, comprising: circuit means, having an input connected to said first divider and an output connected to said control input of said VCO, for monitoring the voltage level of said divided reference signal and converting said voltage level into a second control signal which is directed to said control input of said VCO, whereby the potential across said control input of said VCO is increased, thereby increasing the tuning range of said VCO.
Claim 3
Dependent Claim
40 words
The phase locked loop of claim 1, wherein said circuit means includes means for clamping the voltage of said divided reference signal and means for converting said clamped voltage into a precise negative DC voltage for said second control signal.
Claim 4
Dependent Claim
68 words
The phase locked loop of claim 2, wherein said VCO includes a main tuning varactor diode having a cathode connected to an output of said phase detector for receiving said first control signal and an anode connected to said circuit means for receiving said precise negative DC voltage whereby the bias voltage of said main tuning varactor diode is increased, thereby increasing the tuning range of said VCO.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-20 | 1988-05-21 | 1988-11-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-20 | 1992-05-21 | 1992-11-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-20 | 1996-05-21 | 1996-11-20 | $7700.00 | Window Closed / Lapsed |