US4484144A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor light amplifier
Assignee: KDDI Corp
•
Filing: 1981-07-01
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Granted: 1984-11-20
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Expires: 2001-07-01
Abstract
Abstract A semiconductor light amplifier having an active layer performing a light amplification function, in which the light amplification is performed intermittently by a stable clock timing synchronized with the clock timing of an input light pulse train to the active layer.
Inventors
- 👤 Yukio Nakagome
- 👤 Kitsutaro Amano
- 👤 Takaya Yamamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 19:56
CPC Classifications
H; H01; H01S; H01S5/00; H01S5/50
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
135 words
In combination, a semiconductor light amplifier having an active layer for performing light amplification of input light pulses having peaks applied thereto and developing amplified output light pulses with said peaks amplified, means receptive of the amplified output light pulses and converting them into corresponding electric pulses, detector means for detecting the repetition frequency of peaks in the electric pulses and limiting the amplitude thereof, pulse generating means for receiving the amplitude-limited electric pulses and generating an electric drive pulse train of a stable repetition clock frequency synchronized with the repetition frequency of said peaks and applying the electric drive pulse train to said semiconductor light amplifier for effecting intermittent amplification of the input light pulses applied to the semiconductor light amplifier in synchronism with the pulse repetition frequency of the electric drive pulse train.
Claim 2
Dependent Claim
135 words
In combination, a semiconductor light amplifier having an active layer for performing light amplification of input light pulses having peaks applied thereto and developing amplified output light pulses with said peaks amplified, means receptive of the amplified output light pulses and converting them into corresponding electric pulses, detector means for detecting the repetition frequency of peaks in the electric pulses and limiting the amplitude thereof, pulse generating means for receiving the amplitude-limited electric pulses and generating an electric drive pulse train of a stable repetition clock frequency synchronized with the repetition frequency of said peaks and applying the electric drive pulse train to said semiconductor light amplifier for effecting intermittent amplification of the input light pulses applied to the semiconductor light amplifier in synchronism with the pulse repetition frequency of the electric drive pulse train.
Claim 3
Dependent Claim
29 words
In the combination according to claim 1, in which said pulse generating means comprises a variable delay circuit for variably delaying said electric pulses received from said detector means.
Claim 4
Dependent Claim
119 words
In combination, a semiconductor light amplifier having an active layer for performing light amplification of input light pulses applied thereto and developing amplified output light pulses, means receptive of the amplified output light pulses of the light amplifier for converting the amplified output light pulses into corresponding electric pulses, and including clock pulse generating means receiving the electric pulses for generating an electric drive pulse train of a stable repetition clock frequency synchronized with the repetition clock frequency of said input light pulse train and applying them as a feedback to said semiconductor light amplifier to effect intermittent amplification of said input light pulses in synchronism with and under control of the pulses of the electric drive pulse train.
Claim 5
Dependent Claim
119 words
In combination, a semiconductor light amplifier having an active layer for performing light amplification of input light pulses applied thereto and developing amplified output light pulses, means receptive of the amplified output light pulses of the light amplifier for converting the amplified output light pulses into corresponding electric pulses, and including clock pulse generating means receiving the electric pulses for generating an electric drive pulse train of a stable repetition clock frequency synchronized with the repetition clock frequency of said input light pulse train and applying them as a feedback to said semiconductor light amplifier to effect intermittent amplification of said input light pulses in synchronism with and under control of the pulses of the electric drive pulse train.
Claim 6
Dependent Claim
37 words
In the combination according to claim 3, in which the clock pulse generating means comprises a variable delay circuit for variably timing said electric drive pulses, thereby to vary the timing of the amplified light output pulses.
Claim 7
Dependent Claim
32 words
In the combination according to claim 3, including a beam divider to receive the amplified output light pulses and allow it to pass therethrough and to apply it to the first-mentioned means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-20 | 1988-05-21 | 1988-11-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-20 | 1992-05-21 | 1992-11-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-20 | 1996-05-21 | 1996-11-20 | $7700.00 | Window Closed / Lapsed |