US4484140A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Battery scanning system
Assignee: United States Department of the Navy
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Filing: 1982-04-23
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Granted: 1984-11-20
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Expires: 2002-04-23
Abstract
Abstract A battery scanning system which is capable of monitoring and displaying theoltage of each cell in a battery or upon command provides the cell voltage distribution by displaying the cell number and voltage value of highest and lowest cell. The system has a digital logic system, display, input switches for operator generated variables, an alarm, relays, relay selection gates, an optically coupled isolation amplifier, power source and an analog-digital converter. The optically coupled analog amplifier electrically isolates the system from the battery so that large voltage offsets will not adversely affect the automatic measuring of the cells.
Inventors
- 👤 Lloyd F. Dieu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 00:57
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/36; G01R31/396
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
383 words
A battery scanning system comprising: (a) voltage connecting means for individually connecting across the voltage terminals of each of a plurality of battery cells, said voltage connecting means including (1) a plurality of relays, said plurality of relays being connected to said plurality of cells so that each of said plurality of cells is connected between two of said plurality of relays, (2) a plurality of load resistors, one of said load resistors connected in series with one of said plurality of relays, (3) a positive load line, said positive load line being connected to the positive terminal of each of said cells via one of said load resistors and one of said relays, and (4) a negative load line, said negative load line being connected to the negative terminal of each of said cells via one of said load resistors and one of said relays; (b) an isolation amplifier, the input of said isolation amplifier connected to the output of said voltage connecting means; (c) an analog to digital converter, the output of said isolation amplifier connected to the input of said analog to digital converter; and (d) a digital logic device including a cell selector means for sequentially selecting a predetermined number of cells, a high limit means for determining when a cell has a voltage that is greater than a predetermined high limit and a low limit means for determining when a cell has a voltage that is less than a predetermines low limit; (e) said cell selector means including (1) a ring counter means having a start input and a reset input; (2) a comparator; (3) cell number means for selecting the number of cells to be monitored, (4) means for loading the output of said cell number means in said comparator and for starting said ring counter; (5) means for connecting the individual sequential output of said ring counter to activate the relays associated with each cell sequentially; (6) means for summing the outputs of said ring counter and comparing the sum to the number of cells loaded into said comparator, said comparator providing a reset output when the sum of said ring counter outputs equals the load value; and (7) means for applying said reset output from said comparator to the reset input of said ring counter.
Claim 2
Dependent Claim
383 words
A battery scanning system comprising: (a) voltage connecting means for individually connecting across the voltage terminals of each of a plurality of battery cells, said voltage connecting means including (1) a plurality of relays, said plurality of relays being connected to said plurality of cells so that each of said plurality of cells is connected between two of said plurality of relays, (2) a plurality of load resistors, one of said load resistors connected in series with one of said plurality of relays, (3) a positive load line, said positive load line being connected to the positive terminal of each of said cells via one of said load resistors and one of said relays, and (4) a negative load line, said negative load line being connected to the negative terminal of each of said cells via one of said load resistors and one of said relays; (b) an isolation amplifier, the input of said isolation amplifier connected to the output of said voltage connecting means; (c) an analog to digital converter, the output of said isolation amplifier connected to the input of said analog to digital converter; and (d) a digital logic device including a cell selector means for sequentially selecting a predetermined number of cells, a high limit means for determining when a cell has a voltage that is greater than a predetermined high limit and a low limit means for determining when a cell has a voltage that is less than a predetermines low limit; (e) said cell selector means including (1) a ring counter means having a start input and a reset input; (2) a comparator; (3) cell number means for selecting the number of cells to be monitored, (4) means for loading the output of said cell number means in said comparator and for starting said ring counter; (5) means for connecting the individual sequential output of said ring counter to activate the relays associated with each cell sequentially; (6) means for summing the outputs of said ring counter and comparing the sum to the number of cells loaded into said comparator, said comparator providing a reset output when the sum of said ring counter outputs equals the load value; and (7) means for applying said reset output from said comparator to the reset input of said ring counter.
Claim 3
Dependent Claim
32 words
The system of claim 1 wherein: (a) said isolation amplifier is an optically coupled isolation amplifier that is capable of isolating offset voltages of the order of more than a hundred volts.
Claim 4
Dependent Claim
94 words
The system of claim 1 wherein: (a) said high limit means comprises a high limit comparator including upper and lower registers; (b) the output of said analog to digital converter connected to the input of said lower register, a high limit means for loading a high voltage limit in said upper register; (c) said comparator providing a high indicator output signal when the value in said lower register is greater than the value in said upper register; (d) an alarm device; and (e) said output signal connected to the input of said alarm device.
Claim 5
Dependent Claim
91 words
The system of claim 3 wherein: (a) said low limit means comprises a low limit comparator including upper and lower registers; (b) the output of said analog to digital converter connected to the input of said lower register, a low level means for loading a low level voltage limit in said upper register; (c) said comparator providing a low indicatator output signal when the value in said lower register is lower than the value in said upper register; and (d) said output signal connected to the input of said alarm device.
Claim 6
Dependent Claim
72 words
The system of claim 1 including: (a) display means including a cell voltage display and a cell number display; (b) a counter for counting the number of cells monitored and means for displaying each number in said counter on said number display; (c) said analog to digital converter the voltage of each cell to a binary number; and (d) means for displaying each voltage of each cell on said cell voltage display.
Claim 7
Dependent Claim
27 words
The system of claim 1 including: (a) means for indicating the highest voltage cell of the cells monitored and the lowest voltage cell of the cells monitored.
Claim 8
Dependent Claim
78 words
The system of claim 6 including: (a) means for making a single scan of said predetermined number of cells; (b) high means for displaying for a first predetermined time the value of the highest cell voltage and the cell number of the cell having said highest cell voltage; and (c) low means for displaying for a second predetermined time the value of the lowest cell voltage and the cell number of the cell having said lowest cell voltage.
Claim 9
Dependent Claim
31 words
The system of claim 7 wherein: (a) the time sequence of operation is that said single scan is initially performed; then said high means displays; and then said low means displays.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-20 | 1988-05-21 | 1988-11-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-20 | 1992-05-21 | 1992-11-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-20 | 1996-05-21 | 1996-11-20 | $7700.00 | Window Closed / Lapsed |