US4481675A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse detecting circuit of receiver for use in digital radio communication system
Assignee: NEC Corp
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Filing: 1982-01-15
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Granted: 1984-11-06
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Expires: 2002-01-15
Abstract
Abstract In a pulse detector of a receiver for use in a digital radio communication system comprising a low pass filter supplied with an input signal, a first resistor and a capacitor which are connected in series between an output terminal of the low pass filter and ground to constitute a longer time constant integrating circuit, a second resistor connected in parallel with the first resistor through a switch controlled by a control input, the first and second resistors and the capacitor constituting a shorter time constant integrating circuit, and a comparator with one input connected to the output of the low pass filter and the other input to a juncture between the first and second resistors and the capacitor, the potential of the juncture being utilized as a reference potential of the comparator, there is provided a switch connected between the juncture and the ground in series with the capacitor. According to this invention, pulse detection can be made more accurately and power can be much more saved than a prior art pulse detecting circuit.
Inventors
- 👤 Yoshio Ichikawa
- 👤 Shinjiro Umetsu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 19:51
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/08; H04; H04L; H04L25/00; H04L25/02; H04L25/06; H04L25/061; H04L25/062; H04W; H04W52/00; H04W52/02; H04W52/0209; H04W52/0261; H04W52/0274; H04W88/00; H04W88/02; H04W88/022; Y; Y02; Y02D; Y02D30/00; Y02D30/70
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
111 words
A pulse detecting circuit of a receiver for use in a digital radio communication system in which a power supply means for said receiver is periodically ON-OFF controlled by a control means, said pulse detecting circuit comprising: a first means including a capacitor having a first and second terminal for integrating an input signal received by said receiver; a second means for detecting pulses in said input signal by utilizing an output of said first means as a reference voltage; and a third means coupled to said first means for holding constant the output of said first means every time said source of power supply means is in an OFF state.
Claim 2
Dependent Claim
111 words
A pulse detecting circuit of a receiver for use in a digital radio communication system in which a power supply means for said receiver is periodically ON-OFF controlled by a control means, said pulse detecting circuit comprising: a first means including a capacitor having a first and second terminal for integrating an input signal received by said receiver; a second means for detecting pulses in said input signal by utilizing an output of said first means as a reference voltage; and a third means coupled to said first means for holding constant the output of said first means every time said source of power supply means is in an OFF state.
Claim 3
Dependent Claim
83 words
The pulse detecting circuit according to claim 1 wherein said first means comprises: a first resistor having first and second terminals with said first terminal of said first resistor supplied with said input signal; and said first terminal of said capacitor coupled to said second terminal of said first resistor forming a junction between said second terminal of said first resistor and said first terminal of said capacitor, and said second terminal of said capacitor coupled to a point at a predetermined potential.
Claim 4
Dependent Claim
42 words
The pulse detecting circuit according to claim 2 wherein said third means comprises a switch coupled in series between said junction between said second terminal of said first resistor and said first terminal of said capacitor, and said point of predetermined potential.
Claim 5
Dependent Claim
161 words
The pulse detecting circuit according to claim 1, wherein: said first means comprises a first resistor having first and second terminals with said first terminal coupled to said input signal, a second resistor coupled in parallel with said first terminal of said first resistor through a first switch controlled by a first control input, said first terminal of said capacitor coupled to said second terminal of said first resistor, thereby forming a junction therebetween, and said second terminal of said capacitor coupled to a point at a predetermined potential; said second means comprises a comparator with a first input supplied with said input signal, and a second input for receiving said reference voltage, coupled to said second terminal of said first resistor; and said third means comprises a second switch controlled by a second control input, such that second switch and said capacitor are connected in series between said second terminal of said first resistor and said point of predetermined potential.
Claim 6
Dependent Claim
26 words
The pulse detecting circuit according to claim 4, further comprising means for providing said first and second control inputs upon the reception of said input signal.
Claim 7
Dependent Claim
32 words
The pulse detecting circuit according to claim 2, wherein said first means further comprises a second resistor coupled in parallel with said first resistor through a switch controlled by a control input.
Claim 8
Dependent Claim
24 words
The pulse detecting circuit according to claim 6, further comprising a means for providing said control input upon the reception of said input signal.
Claim 9
Dependent Claim
23 words
The pulse detecting circuit according to claim 1, further comprising a fourth means for feeding therethrough said input signal to said first means.
Claim 10
Dependent Claim
16 words
The pulse detecting circuit according to claim 8, wherein said fourth means comprises a lowpass filter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-06 | 1988-05-07 | 1988-11-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-06 | 1992-05-07 | 1992-11-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-06 | 1996-05-07 | 1996-11-06 | $7700.00 | Window Closed / Lapsed |