US4481578A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Direct memory access data transfer system for use with plural processors
Assignee: Pitney Bowes Inc
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Filing: 1982-05-21
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Granted: 1984-11-06
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Expires: 2002-05-21
Abstract
Abstract Apparatus for transferring data from the memory associated with one processor to the memory associated with another processor. A direct memory access (DMA) controller is connected to each processor and facilitates transfer of bulk data from one memory to the other without the intervention of either or both processors.
Inventors
- 👤 Jodie K. Hughes
- 👤 Sekine Hagiwara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:36
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/28
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
94 words
Apparatus for transferring data comprising: (a) first processing means for handling data; (b) first data storage means operatively connected to said first processing means for storing data; (c) second processing means; (d) second data storage means operatively connected to said second processing means for storing data; and (e) data transfer means operatively connected to said first processing means, to said first data storage means and to said second data storage means for transferring data from said first data storage means to said second data storage means directly and without intervention of said porocessing means.
Claim 2
Dependent Claim
94 words
Apparatus for transferring data comprising: (a) first processing means for handling data; (b) first data storage means operatively connected to said first processing means for storing data; (c) second processing means; (d) second data storage means operatively connected to said second processing means for storing data; and (e) data transfer means operatively connected to said first processing means, to said first data storage means and to said second data storage means for transferring data from said first data storage means to said second data storage means directly and without intervention of said porocessing means.
Claim 3
Dependent Claim
18 words
The apparatus in accordance with claim 1 wherein said data transfer means comprises a direct memory access controller.
Claim 4
Dependent Claim
26 words
The apparatus in accordance with claim 2 wherein said data transfer means further comprises an interprocessor communications bus operatively connected to said direct memory access controller.
Claim 5
Dependent Claim
32 words
The apparatus in accordance with claim 3 wherein said data transfer means further comprises an interprocessor communications controller operatively connected to said interprocessor communications bus for directing the transfer of data thereover.
Claim 6
Dependent Claim
28 words
The apparatus in accordance with claim 1 wherein said first processing means is a display processor and said second processing means is a mass memory data storage processor.
Claim 7
Dependent Claim
15 words
The apparatus in accordance with claim 5 wherein said display processor is a CRT processor.
Claim 8
Dependent Claim
20 words
The apparatus in accordance with claim 5 or 6 wherein said mass memory data storage processor is a disk processor.
Claim 9
Dependent Claim
17 words
The apparatus in accordance with claim 1 wherein said data storage means are random access memory devices.
Claim 10
Dependent Claim
15 words
The apparatus in accordance with claim 1 or 8 wherein said processing means are microprocessors.
Claim 11
Dependent Claim
51 words
Apparatus for transferring data from a first processor unit to a second processor unit, each of said processor units having a respective data storage means, comprising a direct memory access controller for transferring data from the first processor unit data storage means directly to the second processor unit data storage means.
Claim 12
Dependent Claim
51 words
Apparatus for transferring data from a first processor unit to a second processor unit, each of said processor units having a respective data storage means, comprising a direct memory access controller for transferring data from the first processor unit data storage means directly to the second processor unit data storage means.
References Cited (Backward Citations)
US4099236A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-06 | 1988-05-07 | 1988-11-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-06 | 1992-05-07 | 1992-11-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-06 | 1996-05-07 | 1996-11-06 | $7700.00 | Window Closed / Lapsed |