US4477842A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Data reproducing circuit
Assignee: Victor Company of Japan Ltd
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Filing: 1982-04-15
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Granted: 1984-10-16
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Expires: 2002-04-15
Abstract
Abstract A data reproducing circuit comprises a modulated data signal supplying circuit for supplying a modulated data signal including a framing code representing a series of data signals, a clock signal detecting and reproducing circuit supplied with the demodulated data signal, for detecting and reproducing a clock signal, a data signal demodulating circuit supplied with the modulated data signal, for demodulating the data signal, a memory circuit for reading in and reading out a data signal demodulated by the data signal demodulating circuit, a framing code detecting circuit for detecting a framing code within a signal read in by the memory circuit, an instruction signal producing circuit responsive to the detection of the framing code by the framing code detecting circuit, for producing a signal for instructing read-out from the memory circuit, and a dropout detecting circuit for detecting dropout within the modulated data signal supplied thereto and producing a detected output, so that the instruction signal producing circuit does not produce the instruction signal.
Inventors
- 👤 Kenji Kaneko
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 05:46
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/14; G11B20/1403; G11B20/1407; G11B20/1419; H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/93; H04N5/94
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
157 words
A data reproducing circuit comprising: modulated data signal supplying means for supplying a modulated data signal including a framing code representing a series of data signals; clock signal detecting and reproducing means supplied with said demodulated data signal, for detecting and reproducing a clock signal; data signal demodulating means supplied with said modulated data signal, for demodulating said data signal; memory means for reading in and reading out a data signal demodulated by said data signal demodulating means; framing code detecting means for detecting a framing code within a signal read in by said memory means; instruction signal producing means responsive to the detection of said framing code by said framing code detecting means, for producing a signal for instructing read-out from said memory means; and dropout detecting means for detecting dropout within said modulated data signal supplied thereto and producing a detected output, so that said instruction signal producing means does not produce said instruction signal.
Claim 2
Dependent Claim
157 words
A data reproducing circuit comprising: modulated data signal supplying means for supplying a modulated data signal including a framing code representing a series of data signals; clock signal detecting and reproducing means supplied with said demodulated data signal, for detecting and reproducing a clock signal; data signal demodulating means supplied with said modulated data signal, for demodulating said data signal; memory means for reading in and reading out a data signal demodulated by said data signal demodulating means; framing code detecting means for detecting a framing code within a signal read in by said memory means; instruction signal producing means responsive to the detection of said framing code by said framing code detecting means, for producing a signal for instructing read-out from said memory means; and dropout detecting means for detecting dropout within said modulated data signal supplied thereto and producing a detected output, so that said instruction signal producing means does not produce said instruction signal.
Claim 3
Dependent Claim
32 words
A data reproducing circuit as claimed in claim 1 in which said dropout detecting means detects dropout within a clock signal detected and reproduced by said clock signal detecting and reproducing means.
Claim 4
Dependent Claim
50 words
A data reproducing circuit as claimed in claim 1 in which said instruction signal producing means comprises a flip-flop which is set by an output of said framing code detecting means and reset by an output of said dropout detecting means, and produces said instruction signal from a Q-output terminal.
Claim 5
Dependent Claim
25 words
A data reproducing circuit as claimed in claim 1 in which said dropout detecting means resets and clears said memory means by its detected output.
Claim 6
Dependent Claim
68 words
A data reproducing circuit as claimed in claim 1 in which said series of data signals exists within a predetermined horizontal scanning period within a vertical blanking period of a television signal, and which further comprises clearing means for resetting and clearing said memory means upon receipt of a horizontal synchronizing signal in a state where the framing code is not detected by said framing code detecting means.
Claim 7
Dependent Claim
92 words
A data reproducing circuit as claimed in claim 5 in which said instruction signal producing means comprises a flip-flop which is set by the output of said framing code detecting means and produces said instruction signal from its Q-output terminal, and said clearing means comprises an AND-gate which is supplied with a Q-output from a Q-output terminal of said flip-flop and the horizontal synchronizing signal, and produces an output for resetting and clearing said memory means when supplied with said horizontal synchronizing signal in a state where the Q-output is supplied thereto.
Claim 8
Dependent Claim
23 words
A data reproducing circuit as claimed in claim 6 in which said flip-flop is reset by an output of said dropout detecting means.
References Cited (Backward Citations)
US4409627A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-10-16 | 1988-04-16 | 1988-10-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-10-16 | 1992-04-16 | 1992-10-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-10-16 | 1996-04-16 | 1996-10-16 | $7700.00 | Window Closed / Lapsed |