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US4475228A Expired / Lapsed US ⏱️ 0.0 years remaining

Programmable sound circuit for electronic games

Assignee: Bally Manufacturing Corp
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Filing: 1981-11-27
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Granted: 1984-10-02
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Expires: 2001-11-27
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Abstract

Abstract A sound generator for use with microprocessor controlled amusement games includes a programmable sound generator and programmable filters. The programmable filters utilize duty-cycle-controlled resistors to provide analog filtering under microprocessor control. Resistor duty cycles are made variable over a wide range by means of aperiodic clocking signals.

Inventors

  • 👤 Earl C. Vickers

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 05:23
CPC Classifications
G; G10; G10H; G10H1/00; G10H1/02; G10H1/06; G10H1/12

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 227 words
A sound generator for game controlled by a microprocessor, comprising; first clocking means for providing a clock rate with a system cycle time period defining a system cycle, second clocking means for providing clock signals dividing each of said system cycle times into a sequence of at least two subcycles, the time duration of each subcycle in said sequence substantially conforming to a preselected sequence of time durations, sound generating means for generating electrical digital signals having fundamental frequencies in the audio range on each of a plurality of channels, a plurality of programmable filter means, each coupled to a respective channel, for independently filtering the respective signals on such channel with filter characteristics controlled by said microprocessor in accordance with the play of said game to produce a respective filtered output signal, wherein each of said programmable filter means comprises at least one duty-cycle-controlled resistor having an effective conductance proportional to said on-time, and filter control means for controlling the on-time of each duty-cycle-controlled resistor during the time duration of each system cycle so that said on-time is substantially equal to a sum of respective subcycles of said sequence of subcycles, said sum including at least one such subcycle, summing means for mixing and amplifying said filtered output signals to provide electrical analogue signals, and loudspeaker means for converting said electrical analoque signals into audible sound.
Claim 2
Dependent Claim 227 words
A sound generator for game controlled by a microprocessor, comprising; first clocking means for providing a clock rate with a system cycle time period defining a system cycle, second clocking means for providing clock signals dividing each of said system cycle times into a sequence of at least two subcycles, the time duration of each subcycle in said sequence substantially conforming to a preselected sequence of time durations, sound generating means for generating electrical digital signals having fundamental frequencies in the audio range on each of a plurality of channels, a plurality of programmable filter means, each coupled to a respective channel, for independently filtering the respective signals on such channel with filter characteristics controlled by said microprocessor in accordance with the play of said game to produce a respective filtered output signal, wherein each of said programmable filter means comprises at least one duty-cycle-controlled resistor having an effective conductance proportional to said on-time, and filter control means for controlling the on-time of each duty-cycle-controlled resistor during the time duration of each system cycle so that said on-time is substantially equal to a sum of respective subcycles of said sequence of subcycles, said sum including at least one such subcycle, summing means for mixing and amplifying said filtered output signals to provide electrical analogue signals, and loudspeaker means for converting said electrical analoque signals into audible sound.
Claim 3
Dependent Claim 20 words
A sound generator in accordance with claim 1 wherein said programmable filter means includes at least one low pass filter.
Claim 4
Dependent Claim 18 words
A sound generator according to claim 1 wherein said second clocking means comprises a cascade of digital counters.
Claim 5
Dependent Claim 63 words
A sound generator according to claim 1 further comprising basic clock means for providing a basic clock rate and, wherein said second clocking means comprises a ROM clocked at an integer sub-multiple of said basic clock rate, said ROM having logical 1-bits spaced in ROM storage with separations proportional to the time durations of said subcycles in said preselected sequence of time durations.
Claim 6
Dependent Claim 35 words
A sound generator according to claim 4 wherein said integer sub-multiple is greater than 1 and the output of said ROM comprises the input to a parallel-to-serial shift register clocked at said basic clock rate.
Claim 7
Dependent Claim 44 words
A sound generator according to claim 1 wherein said second clocking means comprises a RAM, said RAM having logical 1-bits spaced in RAM storage by said microprocessor with separations proportional to the time durations of said subcycles in said preselected sequence of time durations.
Claim 8
Dependent Claim 104 words
A sound generator according to one of claims 1, 3, 4, 5, or 6 wherein each said duty-cycle-controlled resistor includes switching means and each said filter control means comprises a counter connected to said switching means of said duty-cycle-controlled resistor, and wherein said counter counts from a preset number to an ending number under control of said second clocking means, actuates said means upon reaching said preset number and reloads said preset number at the beginning of each of said system cycles, deactivating said switching means in the process of reloading said preset number when said preset number is different from said ending number.
Claim 9
Dependent Claim 21 words
A sound generator according to claim 1 wherein the time duration of successive subcycles within each system cycle decrease substantially exponentially.

References Cited (Backward Citations)

US4301328A Cited
US4250455A Cited
US4272649A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-10-02 1988-04-02 1988-10-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-10-02 1992-04-02 1992-10-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-10-02 1996-04-02 1996-10-02 $7700.00 Window Closed / Lapsed

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