US4475212A
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Frequency-independent, self-clocking encoding technique and apparatus for digital communications
Assignee: Hewlett Packard Development Co LP
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Filing: 1981-09-11
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Granted: 1984-10-02
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Expires: 2001-09-11
Abstract
Abstract A self-clocking encoding technique for synchronous transmission of digital signals, and apparatus therefor. In an exemplary embodiment, the encoding technique utilizes relatively positive and negative pulses of fixed, predetermined duration. For electrical pulses, the point of reference is preferably a zero baseline. At the leading edge LE i of the i th bit cell, the value of the i th bit is encoded as a positive pulse (e.g., 82A) in the case of a logical "1" or a negative pulse (e.g., 82B) in the case of a logical "0". Further, the next subsequent (i.e., (i+l) th bit has the same value, a pulse (e.g., 82D) of the opposite polarity is injected into the i th bit cell after the leading edge pulse. Thus, positive and negative pulses alternate and the information content of the encoded signal has no d.c. component; this facilitates a.c. coupling. Further, the encoding technique is bit-rate (i.e., frequency-) independent and usable over a wide range of bit transfer rates. The receiver can synchronously decode the signal if it knows the pulse width; it need not know the sender's transmission rate and indeed, bit transmission rate may even change from one bit cell to the next. For a fiber optic implementation, a non-zero baseline is used. The optical zero output level replaces the electrical negative pulse level, the half-maximum optical output level replaces the electrical zero level and the maximum optical output level replaces the electrically positive pulse.
Inventors
- 👤 Peter T. McLean
- 👤 O. Winston Sergeant
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:59
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4904; H03; H03M; H03M5/00; H03M5/02; H03M5/16; H03M5/18; H04L25/4917; H04L25/4923; H04L25/4925
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
276 words
A frequency-independent, self-clocking method for communicating a stream of digital information bits from a sending device to a receiving device, the information bits being communicated at a data rate, wherein each bit is provided for an interval termed a "bit cell" (T i ), the beginning of each bit cell being termed its leading edge, such method comprising the steps of: (a) at the leading edge of the i th bit cell (T i ), transmitting a pulse of a first type when the i th bit is a 1 and transmitting a pulse of a second type when the i th bit is a 0, the pulses of the first and second type being of the predetermined, fixed duration; (b) comparing the i th bit with the (i+1) th bit; and (c) transmitting a second pulse during the i th bit cell, after the first pulse has been transmitted in the i th bit cell, the second pulse being transmitted within a predetermined time interval after the leading edge of the i th bit cell, the time interval being fixed and being independent of the data rate, the transmission of a second pulse being responsive to the comparision step indicating that the (i+1) th bit has the same value as the i th bit, the second pulse being of the second type if the i th bit is a 1 and being the first type if the i th bit is a 0, whereby there is provided an encoded bit stream in which clock and data are combined and which can be decoded without knowledge of the frequency or data rate of the bit stream.
Claim 2
Dependent Claim
276 words
A frequency-independent, self-clocking method for communicating a stream of digital information bits from a sending device to a receiving device, the information bits being communicated at a data rate, wherein each bit is provided for an interval termed a "bit cell" (T i ), the beginning of each bit cell being termed its leading edge, such method comprising the steps of: (a) at the leading edge of the i th bit cell (T i ), transmitting a pulse of a first type when the i th bit is a 1 and transmitting a pulse of a second type when the i th bit is a 0, the pulses of the first and second type being of the predetermined, fixed duration; (b) comparing the i th bit with the (i+1) th bit; and (c) transmitting a second pulse during the i th bit cell, after the first pulse has been transmitted in the i th bit cell, the second pulse being transmitted within a predetermined time interval after the leading edge of the i th bit cell, the time interval being fixed and being independent of the data rate, the transmission of a second pulse being responsive to the comparision step indicating that the (i+1) th bit has the same value as the i th bit, the second pulse being of the second type if the i th bit is a 1 and being the first type if the i th bit is a 0, whereby there is provided an encoded bit stream in which clock and data are combined and which can be decoded without knowledge of the frequency or data rate of the bit stream.
Claim 3
Dependent Claim
28 words
The method of claim 1 wherein the first type of pulse has a first type of electrical polarity and the second type of pulse has opposite electrical polarity.
Claim 4
Dependent Claim
51 words
The method of claim 1 wherein the first type of pulse comprises an optical signal (264) differing in amplitude in a first direction from an average level (262) and the second type of pulse comprises an optical signal (266) differing in amplitude in the opposite direction from the average level (262).
Claim 5
Independent Claim
37 words
The method of any of claims 1-3 wherein the duration of each bit cell is at least as long as the combined duration of two pulses, one of the first type and one of the second type.
Claim 6
Independent Claim
49 words
The method of any of claims 1-3 wherein pulses of the first and second types have equal, but opposite, average amplitude values, whereby the average value of the encoded signal is substantially constant, to facilitate a.c. coupling of the encoded signal between the sending device and the receiving device.
Claim 7
Independent Claim
196 words
A method for communicating binary digital information from a sending device to a receiving device at a data rate, wherein each bit to be communicated is available for an interval termed a "bit cell", the beginning of each bit cell being referred to as its leading edge, such method comprising, at the sending device, the steps of: (a) at the leading edge of the i th bit cell, transmitting a signal of a first type when the i th bit is a 1 and transmitting a signal of a second type when the i th bit is a 0; (b) comparing the i th bit with the (i+1) th ; and (c) a predetermined, fixed duration after the leading edge of the bit cell, changing the transmitted signal from the first type of signal to the second type or vice-versa, responsive to the comparison step indicating that the (i+1) th bit has the same value as the i th bit, and not changing the type of signal transmitted responsive to the comparison step indicating that the (i+1) th bit and the i th bits have different values, said fixed duration being independent of the data rate.
Claim 8
Independent Claim
196 words
A method for communicating binary digital information from a sending device to a receiving device at a data rate, wherein each bit to be communicated is available for an interval termed a "bit cell", the beginning of each bit cell being referred to as its leading edge, such method comprising, at the sending device, the steps of: (a) at the leading edge of the i th bit cell, transmitting a signal of a first type when the i th bit is a 1 and transmitting a signal of a second type when the i th bit is a 0; (b) comparing the i th bit with the (i+1) th ; and (c) a predetermined, fixed duration after the leading edge of the bit cell, changing the transmitted signal from the first type of signal to the second type or vice-versa, responsive to the comparison step indicating that the (i+1) th bit has the same value as the i th bit, and not changing the type of signal transmitted responsive to the comparison step indicating that the (i+1) th bit and the i th bits have different values, said fixed duration being independent of the data rate.
Claim 9
Dependent Claim
102 words
The method of claim 6 further including, at the receiving device, the steps of: responsive to the transmitted signal, generating a received information (RCVD INFO) signal which assumes a first state responsive to reception of a signal of said first type and assumes a second state responsive to reception of a signal of said second type; sampling the received information signal during the first or second type signal transmitted at the leading edge of each bit cell holding the logical value of the sample unchanged between successive samples (272), whereby such sample corresponds to the NRZ waveform provided to the sending device.
Claim 10
Dependent Claim
262 words
Apparatus for encoding an NRZ binary digital signal for communication at a data rate from a sending device to a receiving device, each bit of said signal being present for an interval termed a "bit cell" and the beginning of each bit cell being termed its leading edge, comprising: (a) means (102, 106, 108, 100, 112) for generating a first type of pulse at the leading edge of the i th bit cell responsive to the i th bit having a logical "1" value and for generating a second type of pulse at the leading edge of the i th bit having a logical "0" value; (b) the first and second types of pulses having the same fixed, pre-determined duration such duration being no greater than half the duration of a bit cell and being independent of the data rate; (c) means (108) for comparing the value of the i th bit with the value of the (i+1) th bit; (d) means (104, 106) responsive to the means for comparing, for generating a second pulse during the bit cell, after the pulse at the leading edge of the cell, responsive to the (i+1) th bit having the same value as the i th bit; (e) said second pulse being of the second type if the leading edge pulse was of the first type and being of the first type if the leading edge pulse was of the second type; and (f) means for combining said leading edge pulses and said second pulses into a unified pulse train, to provide an encoded signal.
Claim 11
Dependent Claim
262 words
Apparatus for encoding an NRZ binary digital signal for communication at a data rate from a sending device to a receiving device, each bit of said signal being present for an interval termed a "bit cell" and the beginning of each bit cell being termed its leading edge, comprising: (a) means (102, 106, 108, 100, 112) for generating a first type of pulse at the leading edge of the i th bit cell responsive to the i th bit having a logical "1" value and for generating a second type of pulse at the leading edge of the i th bit having a logical "0" value; (b) the first and second types of pulses having the same fixed, pre-determined duration such duration being no greater than half the duration of a bit cell and being independent of the data rate; (c) means (108) for comparing the value of the i th bit with the value of the (i+1) th bit; (d) means (104, 106) responsive to the means for comparing, for generating a second pulse during the bit cell, after the pulse at the leading edge of the cell, responsive to the (i+1) th bit having the same value as the i th bit; (e) said second pulse being of the second type if the leading edge pulse was of the first type and being of the first type if the leading edge pulse was of the second type; and (f) means for combining said leading edge pulses and said second pulses into a unified pulse train, to provide an encoded signal.
Claim 12
Dependent Claim
68 words
The apparatus of claim 8 wherein the first type of pulse is a constant amplitude pulse of a first electrical polarity and the second type of pulse is a constant amplitude pulse whose amplitude is equal in magnitude but opposite in polarity, whereby the encoded signal produced thereby has a constant average value, facilitating the a.c. coupling of such signal between a sending device and a receiving device.
Claim 13
Dependent Claim
204 words
Apparatus for decoding a signal representing an encoded binary digital data signal and a clocking signal therefor, to provide a decoded NRZ signal corresponding to said binary data signal, wherein for each bit of the binary data signal there is a corresponding interval termed a "bit cell", the beginning of each bit cell being termed its "leading edge", and the encoded signal includes, for each bit cell; a first pulse at the leading edge of the bit cell indicating the value of the data bit associated therewith and, when the bit value of the data bit in the next succeeding bit cell is the same as the bit value for said cell, a second pulse opposite in polarity relative to said first pulse, said decoding apparatus including means for discriminating between said first pulses and said second pulses; and means (200) responsive to said means for discriminating, for determining the value of each of said first pulses and for holding each of said determined values between successive ones of said first pulses, the held values being the decoded NRZ signal; said means for discriminating including a delay of a duration which is fixed and independent of the rate at which the data bits occur.
Claim 14
Dependent Claim
204 words
Apparatus for decoding a signal representing an encoded binary digital data signal and a clocking signal therefor, to provide a decoded NRZ signal corresponding to said binary data signal, wherein for each bit of the binary data signal there is a corresponding interval termed a "bit cell", the beginning of each bit cell being termed its "leading edge", and the encoded signal includes, for each bit cell; a first pulse at the leading edge of the bit cell indicating the value of the data bit associated therewith and, when the bit value of the data bit in the next succeeding bit cell is the same as the bit value for said cell, a second pulse opposite in polarity relative to said first pulse, said decoding apparatus including means for discriminating between said first pulses and said second pulses; and means (200) responsive to said means for discriminating, for determining the value of each of said first pulses and for holding each of said determined values between successive ones of said first pulses, the held values being the decoded NRZ signal; said means for discriminating including a delay of a duration which is fixed and independent of the rate at which the data bits occur.
Claim 15
Dependent Claim
163 words
Apparatus for decoding a digital signal to provide a decoded NRZ signal, the encoded signal being a stream of relatively positive and relatively negative pulses of predetermined, fixed duration, the stream including data pulses and compensation pulses, the decoding apparatus comprising: (a) means for detecting said negative pulses; (b) means for detecting said positive pulses; (c) means responsive to the negative and positive pulse detecting means for setting a bilevel signal to a first binary level at the leading edge of a negative pulse and for setting said bilevel signal to a second binary level at the leading edge of a positive pulse; and (d) means for sampling said bilevel signal at a predetermined time after the leading edge of a pulse, such predetermined time being fixed and independent of the rate at which the data pulses occur in the stream and for holding the sampled values thereof between the taking of samples, such that the sampled values constitute the decoded NRZ signal.
Claim 16
Dependent Claim
163 words
Apparatus for decoding a digital signal to provide a decoded NRZ signal, the encoded signal being a stream of relatively positive and relatively negative pulses of predetermined, fixed duration, the stream including data pulses and compensation pulses, the decoding apparatus comprising: (a) means for detecting said negative pulses; (b) means for detecting said positive pulses; (c) means responsive to the negative and positive pulse detecting means for setting a bilevel signal to a first binary level at the leading edge of a negative pulse and for setting said bilevel signal to a second binary level at the leading edge of a positive pulse; and (d) means for sampling said bilevel signal at a predetermined time after the leading edge of a pulse, such predetermined time being fixed and independent of the rate at which the data pulses occur in the stream and for holding the sampled values thereof between the taking of samples, such that the sampled values constitute the decoded NRZ signal.
Claim 17
Dependent Claim
209 words
Apparatus for decoding a digital signal which has been encoded into a stream of relatively positive and relatively negative pulses of predetermined, fixed duration, to provide a decoded NRZ signal comprising: (a) means 206 for detecting said negative pulses; (b) means 204 for detecting said positive pulses; (c) flip-flop means 210 responsive to the negative and positive pulse detecting means for setting a bistable signal to a first binary level at the leading edge of a negative pulse and for setting said bistable signal to a second binary level at the leading edge of a positive pulse; (d) means 222 for storing a sample of the bistable signal from one sample time to a next sample time, responsive to a clocking signal, said stored bistable signal comprising the logical complement of the decoded NRZ signal; (e) means for generating a clocking signal, comprising (1) an exclusive-OR gate 218 receiving as a first input the bistable signal and as a second input the stored bistable signal; (2) delay means 222 connecting the output of the exclusive-OR gate to the means for storing a sample of the bistable signal for providing, as a clocking signal, the output of the exclusive-OR gate delayed by an interval equal to the predetermined pulse duration.
Claim 18
Dependent Claim
209 words
Apparatus for decoding a digital signal which has been encoded into a stream of relatively positive and relatively negative pulses of predetermined, fixed duration, to provide a decoded NRZ signal comprising: (a) means 206 for detecting said negative pulses; (b) means 204 for detecting said positive pulses; (c) flip-flop means 210 responsive to the negative and positive pulse detecting means for setting a bistable signal to a first binary level at the leading edge of a negative pulse and for setting said bistable signal to a second binary level at the leading edge of a positive pulse; (d) means 222 for storing a sample of the bistable signal from one sample time to a next sample time, responsive to a clocking signal, said stored bistable signal comprising the logical complement of the decoded NRZ signal; (e) means for generating a clocking signal, comprising (1) an exclusive-OR gate 218 receiving as a first input the bistable signal and as a second input the stored bistable signal; (2) delay means 222 connecting the output of the exclusive-OR gate to the means for storing a sample of the bistable signal for providing, as a clocking signal, the output of the exclusive-OR gate delayed by an interval equal to the predetermined pulse duration.
Claim 19
Dependent Claim
36 words
The apparatus of claim 12 further including means responsive to the positive and negative pulse detecting means for sensing the occurrence of two successive pulses of the same polarity without an intervening pulse of opposite polarity.
Claim 20
Dependent Claim
51 words
The apparatus of claim 8 wherein the first type of pulse comprises an optical signal (264) differing in amplitude in a first direction from an average level (262) and the second type of pulse comprises an optical signal (266) differing in amplitude in the opposite direction from the average level (262).
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-10-02 | 1988-04-02 | 1988-10-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-10-02 | 1992-04-02 | 1992-10-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-10-02 | 1996-04-02 | 1996-10-02 | $7700.00 | Window Closed / Lapsed |