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US4475165A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of data entry and execution of a two variable calculator function in the same manner and entry format as a single variable function

Assignee: Texas Instruments Inc
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Filing: 1981-07-06
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Granted: 1984-10-02
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Expires: 2001-07-06
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Abstract

Abstract A data processing apparatus includes a novel method of entering the data for a function which requires two integral operands. First and second preselected sets of the digits of the current output numerical value are interpreted as the first and second integral operands. In the preferred embodiment a predetermined number of the least significant whole number digits is interpreted as the first operand and the predetermined number of the most significant fractional digits is the second operand. This data entry method reduces the amount of memory required to store the operands and to execute the function. This data entry method also enables entry and execution of these two variable functions in the same mathematical hierarchy as single operand functions. In the case of the preferred embodiment, in which this data entry method is used for calculating permutations and combinations, this is the preferred and mathematically correct method of executing these functions.

Inventors

  • 👤 Samir W. Rizk
  • 👤 Stoddard S. Millwright

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 18:46
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/02

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 208 words
A data processing apparatus comprising: an operator input means including means for entering data digits and a decimal point and means for entering operational commands, said operational commands including at least one binary operational command corresponding to a binary operation mathematically defined only for first and second integral operands; an indicator memory means for storing data, consisting of a plurality of data digits and a decimal point, therein; an indicator means for generating an operator perceivable indication of said data stored in said indicator memory; and an arithmetic means, responsive to said input means and connected to said indicator memory, for storing entered data digits and an entered decimal point in said indicator memory, for performing entered operational commands on entered data and storing the result in said indicator memory and for performing said at least one binary operation requiring first and second integral operands upon entry of said at least one binary operational command and storing the result in said indicator memory, a first set of said data digits stored in said indicator memory, a first set of said data digits stored in said indicator memory being said first operand and a second set of said data digits stored in said indicator memory being said second operand.
Claim 2
Dependent Claim 208 words
A data processing apparatus comprising: an operator input means including means for entering data digits and a decimal point and means for entering operational commands, said operational commands including at least one binary operational command corresponding to a binary operation mathematically defined only for first and second integral operands; an indicator memory means for storing data, consisting of a plurality of data digits and a decimal point, therein; an indicator means for generating an operator perceivable indication of said data stored in said indicator memory; and an arithmetic means, responsive to said input means and connected to said indicator memory, for storing entered data digits and an entered decimal point in said indicator memory, for performing entered operational commands on entered data and storing the result in said indicator memory and for performing said at least one binary operation requiring first and second integral operands upon entry of said at least one binary operational command and storing the result in said indicator memory, a first set of said data digits stored in said indicator memory, a first set of said data digits stored in said indicator memory being said first operand and a second set of said data digits stored in said indicator memory being said second operand.
Claim 3
Dependent Claim 50 words
A data processing apparatus as claimed in claim 1, wherein: said first set of said data digits consists of a predetermined integral number of the least significant whole number digits; and said second set of said data digits consists of said predetermined integral number of the most significant fractional digits.
Claim 4
Dependent Claim 16 words
A data processing apparatus as claimed in claim 2, wherein said predetermined integral number is 3.
Claim 5
Dependent Claim 34 words
A data processing apparatus as claimed in claim 1, wherein: said at least one binary operational command includes the operation of calculating the number of combinations of n things taken r at a time.
Claim 6
Dependent Claim 34 words
A data processing apparatus as claimed in claim 1, wherein: said at least one binary operational command includes the operation of calculating the number of permutations of n things taken r at a time.
Claim 7
Dependent Claim 109 words
A data processing apparatus as claimed in claim 1, wherein: said operational commands further include unitary operational commands, binary operational commands, a left-hand parenthesis command and a right-hand parenthesis command; and said arithmetic means includes hierarchy means for performing entered operational commands on entered data in accordance with a fixed heirarchy of operations associated with said entered operational commands as modified by entered left-hand parenthesis commands and entered right-hand parenthesis commands, said hierarchy means performing said binary operational commands corresponding to a binary operation integral operands with a fixed hierarchy of operation equal to said fixed hierarchy of operation associated with at least one of said unitary operational commands.

References Cited (Backward Citations)

US3762637A Cited
US4149261A Cited
US4208720A Cited
US4302816A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-10-02 1988-04-02 1988-10-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-10-02 1992-04-02 1992-10-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-10-02 1996-04-02 1996-10-02 $7700.00 Window Closed / Lapsed

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