Pattern testing apparatus

Claim 1

A two-dimensional pattern defect testing apparatus wherein digital signals representative of a two-dimensional pattern having a line pattern are serially stored in register means, said two-dimensional pattern is divided into a predetermined number of picture cells, the densities of the respective picture cells are represented by said digital signals and a defect in said two-dimensional pattern is detected based on said digital signals stored in said register means, comprising: (a) first detection means including means for defining a first area on said two-dimensional pattern, said first detection means receiving digital signals representative of the pattern in said first area from said register means and producing a first detection signal when all of the received digital signals have the same logical value; (b) second detection means including means for defining a second area on said two-dimensional pattern, said second detection means receiving the digital signals representative of the pattern in said second area and producing a second detection signal when at least one of the received digital signals has a logical value different from the logical value of the digital signals received by said first detection means; said second area being within a rectangle having two opposing sides separated by a shorter distance than a width of said line pattern and being analogous to a shape defined by said two opposing sides and a pair of opposing line segments extending between opposite ends of said two opposing sides, at least one of said pair of line segments being an arc; said first area including two areas adjacent to said two opposing sides of said second area; and (c) discrimination means for discriminating the presence of the defect in said second area when said first detection signal and said second detection signal are applied thereto.