Variable frame length data converter for a speech synthesis circuit

Claim 2

A speech synthesis system comprising: input means for receiving encoded speech data in respective data frames of variable length, wherein said variable length data frames include encoded speech parameters of variable length which are representative of pitch, energy and filter coefficients, and each frame of said variable length data frames having at least one encoded speech parameter; speech synthesis means coupled to said input means for converting said encoded variable length speech parameters into analog signals representative of human speech, said speech synthesis means including: timing means for generating timing signals including data frame timing signals indicative of the start of each successive data frame and a plurality of parameter count timing signals within each time interval between successive data frame timing signals, said parameter count timing signals being indicative of the start of each encoded parameter in a data frame; control means coupled to said input means and said timing means for enabling said input means to initiate the receipt of a new data frame of speech data in response to each said data frame timing signal and for regulating the inputting of said encoded speech parameters into said input means in timed relationship with respect to said parameter count timing signals generated by said timing means; means coupled to said input means and said timing means for testing a first encoded parameter loaded into said input means after the occurrence of a data frame timing signal to determine whether said first encoded parameter is a preselected code; control circuit means responsive to the detection of said preselected code for said first encoded parameter to generate an inhibit signal preventing the loading of further parameters into said input means until the next data frame of speech data is ready to be input to said input means as determined by the occurrence of said data frame timing signal; and audio means for convering said analog signals representative of human speech into audible sounds.

Claim 3

A speech synthesis system as set forth in claim 1, wherein said speech synthesis means further includes means for detecting the presence of a predetermined indicator after the occurrence of a data frame timing signal, the detection of the presence of said predetermined indicator signifying that said data frame contains only two encoded parameters.

Claim 4

A speech synthesis system as set forth in claim 2, wherein the position of said predetermined indicator is located between said first encoded parameter and a second encoded parameter.

Claim 5

A speech synthesis system as set forth in claim 3, wherein said predetermined indicator is a data bit in a particular binary state.

Claim 6

A speech synthesis system as set forth in claim 1, wherein said first encoded parameter is indicative of an energy parameter and wherein the state of said energy parameter equal to zero is indicative of a pause during speech.

Claim 7

A speech synthesis system as set forth in claim 4, wherein the presence of said data bit in a "one" binary state is indicative of a repeat data frame in which said first encoded parameter and said second encoded parameter are indicative of an energy parameter and a pitch parameter respectively.

Claim 8

A speech synthesis system as set forth in claim 3, wherein said second encoded parameter is indicative of a pitch parameter and wherein the state of said pitch parameter equal to zero is indicative of an unvoiced speech data frame.

Claim 9

A speech synthesis system comprising: input means for receiving encoded speech data in respective data frames of variable length, wherein said variable length data frames include encoded speech parameters of variable length which are representative of pitch, energy and filter coefficients, and each frame of said variable length data frames having at least one encoded speech parameter; speech synthesis means coupled to said input means for converting said encoded variable length speech parameters into analog signals representative of human speech, said speech synthesis means including: timing means for generating timing signals including data frame timing signals indicative of the start of each successive data frame and a plurality of parameter count timing signals within each time interval between successive data frame timing signals, said parameter count timing signals being indicative of the start of each encoded parameter in a data frame; control means coupled to said input means and said timing means for enabling said input means to initiate the receipt of a new data frame of speech data in response to each said data frame timing signal and for regulating the inputting of said encoded speech parameters into said input means in timed relationship with respect to said parameter count timing signals generated by said timing means; means coupled to said input means and said timing means for testing an encoded speech parameter loaded into said input means after the occurrence of a data frame timing signal to determine whether said encoded speech parameter is a preselected code; control circuit means responsive to the detection of said preselected code for said encoded parameter which was tested to generate an inhibit signal preventing interpolation of speech parameter values between successive incoming data frames until the next data frame of speech data is ready to be input to said input means as determined by the occurrence of said data frame timing signal; and audio means for converting said analog signals representative of human speech into audible sounds.

Claim 10

A speech synthesis system comprising: input means for receiving encoded speech data in respective data frames of variable length, wherein said variable length data frames include encoded speech parameters of variable length which are representative of pitch, energy and filter coefficients, and each frame of said variable length data frames having at least one encoded speech parameter; speech synthesis means coupled to said input means for converting said encoded variable length speech parameters into analog signals representative of human speech, said speech synthesis means including: timing means for generating timing signals including data frame timing signals indicative of the start of each successive data frame and a plurality of parameter count timing signals within each time interval between successive data frame timing signals, said parameter count timing signals being indicative of the start of each encoded parameter in a data frame; control means coupled to said input means and said timing means for enabling said input means to initiate the receipt of a new data frame of speech data in response to each said data frame timing signal and for regulating the inputting of said encoded speech parameters into said input means in timed relationship with respect to said parameter count timing signals generated by said timing means; means coupled to said input means and said timing means for testing an encoded speech parameter loaded into said input means after the occurrence of a data frame timing signal to determine whether said encoded speech parameter is a preselected code; control circuit means responsive to the detection of said preselected code for said encoded parameter which was tested to generate an inhibit signal preventing interpolation of speech parameter values between successive incoming data frames until the next data frame of speech data is ready to be input to said input means as determined by the occurrence of said data frame timing signal; and audio means for converting said analog signals representative of human speech into audible sounds.