Monitor for an electrically-controlled system

Claim 2

A monitor for an electrically controlled system comprising: (a) a switch having a voltage impressed thereacross; (b) means for sensing the voltage signal across said switch in the open and closed positions; and (c) means for disabling the electrically-controlled system if said sensed voltage signal in one of either the open or closed positions does not vary from the sensed voltage level in the other of the closed and open positions by a predetermined voltage limit.

Claim 3

The monitor of claim 1 wherein said means for disabling the electrically-controlled system disables the system if said sensed voltage level in the closed position is greater than a predetermined lower threshold.

Claim 4

The monitor of claims 1 or 2 further comprising means for delaying said means for disabling if said switch is in the closed position until saidswitch is in the open position.

Claim 5

The monitor of claim 1 wherein said means for sensing said voltage signal includes an optocoupler to generate logic signals on the output thereof representative of a level of said voltage signal relative a voltage threshold.

Claim 6

The monitor of claim 1 wherein: (a) said means for sensing said voltage signal includes first and second optocouplers; (b) said first optocoupler being adapted to generate a first logic signal on the output thereof representative of a first level of said voltage signal relative an upper voltage threshold; (c) said second optocoupler being adapted to generate a second logic signal on the output thereof representative of a second level of said signal relative a lower voltage threshold said second logic level having the opposite logic state of said first logic signal; (d) said upper voltage threshold being greater than said lower voltage threshold; (e) means for comparing the logic states of said first and second logic signals and generating an output signal when said first and second logic signals are out of phase and have the same logic state; (f) time delay means for establishing a predetermined time limit and generating a disabling signal when said output signal is present for said predetermined time limit; and (g) said means for disabling the system responding to said disabling signal, such that said system is disabled when said first voltage level is less than said upper voltage threshold or when said second voltage level is greater than said lower voltage threshold.

Claim 7

The monitor of claim 5 further including means for amplifying said first and second logic signals.

Claim 8

The monitor of claim 5 wherein said means for disabling comprises a relay.

Claim 9

The monitor of claim 1 further comprising means for energizing an alarm when said system is disabled.

Claim 10

A monitor for a system controlled by a switch having conducting and non-conducting positions, comprising: (a) first and second sensing means connected to the switch for sensing voltages across the switch in the conducting and non-conducting positions; (b) said first sensing means shifting a first sensing signal to a different logic state when said sensed voltage is less than a first predetermined threshold; (c) said second sensing means shifting a second sensing signal to a different logic state when said sensed voltage is less than a second predetermined threshold; (d) said first and second sensing signals being out of phase when said sensed voltage is greater than said first threshold or less than said second threshold, but in phase when said voltage is between said first and second thresholds; (e) means for generating a phase signal when said first and second signals are in phase; (f) timing means for generating a disabling signal after said phase signal has been present for a predetermined interval of time; and (g) means for disabling the system in response to said disabling signal when said first and second sensing signals are in phase for a time period longer than said predetermined time interval.

Claim 11

A monitor for a system controlled by a switch having conducting and non-conducting positions, comprising: (a) first and second sensing means connected to the switch for sensing voltages across the switch in the conducting and non-conducting positions; (b) said first sensing means shifting a first sensing signal to a different logic state when said sensed voltage is less than a first predetermined threshold; (c) said second sensing means shifting a second sensing signal to a different logic state when said sensed voltage is less than a second predetermined threshold; (d) said first and second sensing signals being out of phase when said sensed voltage is greater than said first threshold or less than said second threshold, but in phase when said voltage is between said first and second thresholds; (e) means for generating a phase signal when said first and second signals are in phase; (f) timing means for generating a disabling signal after said phase signal has been present for a predetermined interval of time; and (g) means for disabling the system in response to said disabling signal when said first and second sensing signals are in phase for a time period longer than said predetermined time interval.

Claim 12

The monitor of claim 9 wherein said first and second means for sensing each comprises an optocoupler.

Claim 13

The monitor of claim 10 further including a first transistor for amplifying said first sensing signal, a second transistor for amplifying said second sensing signal, and means for inverting said second sensing signal.

Claim 14

The monitor of claim 11 wherein said means for disabling comprises: (b) a first relay having a coil and a normally open relay switch, said coil being connected to said first and second sensing signals amplified by said first and second transistors, such that when said sensing signals are out of phase said first relay is energized and said first relay switch is closed; and (b) a second relay having a second relay coil and a normally open second relay switch disposed to disable the system in the open position and maintain the system in the operative mode in the closed position; (c) said second relay coil being connected in series to a first direct current source controlled by said first relay switch, such that when said first relay switch is closed, said second relay coil is energized and said second relay switch is closed; and (d) a capacitor connected across said second relay coil to maintain said second relay coil energized for a predetermined time period when said first relay switch is open, such that a time limit for in phase first and second sensing signals is established.

Claim 15

The monitor of claim 12 wherein said first direct current source is a rectifier bridge connected in series to said first relay switch and to an alternating current control voltage.

Claim 16

The monitor of claim 12 further comprising an in-use relay having a third relay coil and a normally open third relay switch, said third relay coil being connected in series to a second direct current source controlled by the system switch, and said third relay switch being disposed to maintain the system in an operative mode in the closed position, thereby delaying said means for disabling until said system switch is in the open position.

Claim 17

The monitor of claim 14 wherein said second direct current source is a rectifier bridge connected in series to said system switch and to an alternating current control voltage.

Claim 18

The monitor of claim 15 further comprising a delay capacitor connected across said third relay coil.

Claim 19

An automatic doorway system comprising: (a) a system controller for controlling the automatic doorway system; (b) a switch connected to said system controller and operated by a safety mat, said switch having an open position for a non-conducting state and a closed position for a conducting state; (c) first and second means connected across said switch for sensing voltage drops across said switch; (d) said first sensing means shifting a first sensing signal to a different logic state when said voltage drop is less than a first predetermined threshold; (e) said second sensing means shifting a second sensing signal to a different logic state when said voltage drop is less than a second predetermined threshold; (f) said first and second sensing means shifting said first and second sensing signals, respectively, when said switch is properly operating; (g) said first and second sensing signals being out of phase when said voltage drop is greater than said first threshold or less than said second threshold, but in phase when said voltage drop is between said first and second thresholds; (h) means for generating an in phase signal when said first and second sensing signals are in phase; (i) timing means for generating a disabling signal after said in phase signal has been present for a predetermined interval of time; and (j) means for disabling the system in response to said disabling signal when said first and second sensing signals are in phase for a time period longer than said predetermined time interval.

Claim 20

An automatic doorway system comprising: (a) a system controller for controlling the automatic doorway system; (b) a switch connected to said system controller and operated by a safety mat, said switch having an open position for a non-conducting state and a closed position for a conducting state; (c) first and second means connected across said switch for sensing voltage drops across said switch; (d) said first sensing means shifting a first sensing signal to a different logic state when said voltage drop is less than a first predetermined threshold; (e) said second sensing means shifting a second sensing signal to a different logic state when said voltage drop is less than a second predetermined threshold; (f) said first and second sensing means shifting said first and second sensing signals, respectively, when said switch is properly operating; (g) said first and second sensing signals being out of phase when said voltage drop is greater than said first threshold or less than said second threshold, but in phase when said voltage drop is between said first and second thresholds; (h) means for generating an in phase signal when said first and second sensing signals are in phase; (i) timing means for generating a disabling signal after said in phase signal has been present for a predetermined interval of time; and (j) means for disabling the system in response to said disabling signal when said first and second sensing signals are in phase for a time period longer than said predetermined time interval.

Claim 23

The method of claim 18 wherein said sensing step includes generating by means of an optocoupler a logic signal representative of a voltage level relative a voltage threshold.

Claim 24

The method of claim 19 wherein said step of disabling includes detecting an out of phase relationship of logic signals representative of the voltage variations.