Voltage sense circuit for a bubble memory voltage booster

Claim 3

An apparatus according to claim 1 wherein said current mirror means comprises: a first transistor having an emitter coupled to said second supply voltage conductor and having a base and collector coupled to receive said first current; a second transistor having an emitter coupled to said second supply voltage conductor, a base coupled to the base of said first transistor and a collector at which said second current is generated, said at least one transistor being coupled between said node and the collector of said second transistor such that when the voltage at said node exceeds the breakdown voltage of said at least one transistor, said second current substantially exceeds said first current and when the voltage at said node is below of said break-down voltage, said first and second currents are substantially equal.

Claim 4

An apparatus according to claim 2 further including a means for limiting the voltage across the collector and the emitter of said second transistor to V BE when the voltage at said node is less than said break-down voltage.

Claim 5

An apparatus according to claim 3 wherein said at least one transistor has a collector coupled to said node, an emitter coupled to the collector of said second transistor and a base, and wherein said means for limiting comprises first, second, and third diode connected transistors coupled between the collector of said first transistor and the base of said at least one transistor.

Claim 6

An apparatus according to claim 4 wherein said comparator means comprises: a current source coupled to said first supply voltage conductor; a fourth transistor having a base coupled to said node, an emitter coupled to said current source and having a collector; and a fifth transistor having an emitter coupled to said current source, a base coupled to said reference voltage generating means and a collector coupled to said second supply voltage conductor, said fourth transistor turning on when said node falls below said reference voltage so as to supply current to its collector.

Claim 7

A voltage boost circuit for generating a high voltage across a capacitor by alternately drawing current through an inductor coupled to said capacitor and terminating said current so as to produce a voltage across said inductor which causes charge to be transferred to and stored in said capacitor, comprising: first and second supply voltage conductors; comparator means having a first input coupled to a first terminal of said inductor and having a second input; reference voltage generating means coupled to the second input of said comparator means and to said first and second supply voltage conductors for establishing a reference voltage at said second input; current mirror means coupled to said first input for receiving a first current and for generating a second current; transistor means including at least one transistor coupled between said first input and said current mirror means for acting as a BV ceo level shifter when the voltage at said first input exceeds the breakdown voltage of said at least one transistor; output transistor means having a collector coupled to said first terminal, an emitter coupled to said second supply voltage conductor and having a base; and first means coupled between said comparator means and the base of said output transistor means for turning said output transistor means on so as to cause current to flow through said inductor when the voltage at said second terminal is below a predetermined value and for turning said output transistor means off when the current flowing through said output transistor means reaches a predetermined value.

Claim 8

A voltage boost circuit for generating a high voltage across a capacitor by alternately drawing current through an inductor coupled to said capacitor and terminating said current so as to produce a voltage across said inductor which causes charge to be transferred to and stored in said capacitor, comprising: first and second supply voltage conductors; comparator means having a first input coupled to a first terminal of said inductor and having a second input; reference voltage generating means coupled to the second input of said comparator means and to said first and second supply voltage conductors for establishing a reference voltage at said second input; current mirror means coupled to said first input for receiving a first current and for generating a second current; transistor means including at least one transistor coupled between said first input and said current mirror means for acting as a BV ceo level shifter when the voltage at said first input exceeds the breakdown voltage of said at least one transistor; output transistor means having a collector coupled to said first terminal, an emitter coupled to said second supply voltage conductor and having a base; and first means coupled between said comparator means and the base of said output transistor means for turning said output transistor means on so as to cause current to flow through said inductor when the voltage at said second terminal is below a predetermined value and for turning said output transistor means off when the current flowing through said output transistor means reaches a predetermined value.

Claim 9

A circuit according to claim 6 wherein said current mirror means comprises: a first transistor having its base and collector coupled together for receiving said first current and having an emitter coupled to said second supply voltage conductor; and a second transistor having a base coupled to the base of said first transistor, an emitter coupled to said second supply voltage conductor, and a collector coupled to said at least one transistor such that said first and second currents are equal when the voltage at said first terminal is below the breakdown voltage of said at least one transistor, and said second current is greater than said first current when the voltage at said first terminal exceeds the breakdown voltage of said at least one transistor.

Claim 10

A circuit according to claim 7 further including means for limiting the collector-emitter voltage of said second transistor when the voltage at said first terminal is less than said breakdown voltage.

Claim 11

A circuit according to claim 8 wherein said at least one transistor has an emitter coupled to the collector of said second transistor, a collector coupled to said first terminal and to said comparator means and a base and wherein said means for limiting comprises: first, second and third diode coupled transistors coupled between said first transistor and the base of said at least one transistor.

Claim 12

The circuit according to claim 9 wherein said comparator means comprises: a fourth transistor having a base coupled to said first terminal, an emitter coupled to said first supply voltage conductor and a collector coupled to said first means; and a fifth transistor having an emitter coupled to the first supply voltage conductor, a base coupled to said reference voltage generating means, and a collector coupled to said second supply voltage conductor.

Claim 13

A circuit according to claim 10 further comprising level shifting means coupled between said first terminal and the base of said fourth transistor.

Claim 14

In a voltage boost circuit of the type wherein an output transistor is alternately turned on and off so as to first draw current through an inductor and then terminate the current through said output transistor so as to produce a voltage across the inductor which causes charge to be transferred to and stored in a capacitor, a circuit for sensing when the voltage cross the inductor falls below a predetermined value comprising: first and second supply voltage conductors; comparator means having first and second inputs; reference voltage generating means coupled to said first and second supply voltage conductors and to the second input of said comparator means for establishing a reference voltage at said second input; level shifting means coupled between the first terminal of said inductor and said first input; current mirror means coupled to said first input for receiving a first current and for generating a second current; and transistor means including at least one transistor coupled between said first input and said current mirror means for acting as a BV ceo level shifter when the voltage at said first input exceeds the breakdown voltage of said at least one transistor.

Claim 15

In a voltage boost circuit of the type wherein an output transistor is alternately turned on and off so as to first draw current through an inductor and then terminate the current through said output transistor so as to produce a voltage across the inductor which causes charge to be transferred to and stored in a capacitor, a circuit for sensing when the voltage cross the inductor falls below a predetermined value comprising: first and second supply voltage conductors; comparator means having first and second inputs; reference voltage generating means coupled to said first and second supply voltage conductors and to the second input of said comparator means for establishing a reference voltage at said second input; level shifting means coupled between the first terminal of said inductor and said first input; current mirror means coupled to said first input for receiving a first current and for generating a second current; and transistor means including at least one transistor coupled between said first input and said current mirror means for acting as a BV ceo level shifter when the voltage at said first input exceeds the breakdown voltage of said at least one transistor.

Claim 16

The circuit according to claim 12 wherein said comparator means comprises: a first transistor having a base coupled to said level shifter and to said at least one transistor, an emitter coupled to said first supply voltage conductor, and having a collector; and a second transistor having an emitter coupled to said first supply voltage conductor, a collector coupled to said second supply voltage conductor, and a base coupled to said reference voltage generating means, said first transistor being turned on when the voltage at said first input falls below said predetermined value.