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US4461003A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit arrangement for preventing a microcomputer from malfunctioning

Assignee: Denso Corp
•
Filing: 1981-06-03
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Granted: 1984-07-17
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Expires: 2001-06-03
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Abstract

Abstract In a microcomputer system arranged to operate with electrical power from a battery installed on a vehicle, the voltage of the power is detected to see whether it is below a predetermined value or not. When the voltage is below the predetermined value, a voltage detector produces an output signal which will be fed to a switching circuit formed by a D-type flip-flop. The D-type flip-flop is also responsive to a read instruction signal applied from the central processing unit of the microcomputer to a nonvolatile random access memory (RAM) thereof which is supplied with power from the battery all the time. With this arrangement, when voltage drop or sag is detected, the RAM is put in stand-by condition in which reading and writing operations are inhibited. In this stand-by condition of the RAM a central processing unit (CPU) of the microcomputer system is capable of operating as long as the power voltage is above the minimum operating voltage of the CPU.

Inventors

  • 👤 Kazuyoshi Tamaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 00:52
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/004

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 248 words
A circuit arrangement for preventing a microcomputer from malfunctioning, said microcomputer having at least a central processing unit, a random access memory and a control bus through which control signals including read and write instruction signals are fed from said central processing unit to said random access memory, said central processing unit being arranged to receive electrical power via a switch from a battery installed on a vehicle, said random access memory being arranged to always receive electrical power from said battery, said random access memory having a chip-select terminal for receiving a stand-by signal for prohibiting reading and writing operations thereof, said circuit arrangement comprising: first means for monitoring the voltage of said battery and producing an output signal when the voltage of said battery is below a predetermined value; and second means responsive to said output signal from said first means and to one of said control signals other than said write instruction signal, which control signal is fed via said control bus thereto, for producing said stand-by signal with which said random access memory will be put in stand-by condition in which reading and writing operations of said random access memory are prohibited, said second means producing said stand-by signal substantially simultaneously with said one of said control signals other than said write instruction signal, which control signal is arranged to exist when said write instruction signal is absent, said stand-by signal being continued as long as the battery voltage is below said predetermined value.
Claim 2
Dependent Claim 248 words
A circuit arrangement for preventing a microcomputer from malfunctioning, said microcomputer having at least a central processing unit, a random access memory and a control bus through which control signals including read and write instruction signals are fed from said central processing unit to said random access memory, said central processing unit being arranged to receive electrical power via a switch from a battery installed on a vehicle, said random access memory being arranged to always receive electrical power from said battery, said random access memory having a chip-select terminal for receiving a stand-by signal for prohibiting reading and writing operations thereof, said circuit arrangement comprising: first means for monitoring the voltage of said battery and producing an output signal when the voltage of said battery is below a predetermined value; and second means responsive to said output signal from said first means and to one of said control signals other than said write instruction signal, which control signal is fed via said control bus thereto, for producing said stand-by signal with which said random access memory will be put in stand-by condition in which reading and writing operations of said random access memory are prohibited, said second means producing said stand-by signal substantially simultaneously with said one of said control signals other than said write instruction signal, which control signal is arranged to exist when said write instruction signal is absent, said stand-by signal being continued as long as the battery voltage is below said predetermined value.
Claim 3
Dependent Claim 45 words
A circuit arrangement as claimed in claim 1, wherein said second means comprises a D-type flip-flop having a data input terminal responsive to said output signal from said first means, and a clock input terminal responsive to said read instruction signal from said control bus.
Claim 4
Dependent Claim 27 words
A circuit arrangement as claimed in claim 1, further comprising a voltage regulator for regulating the voltage from said battery, which voltage is applied via said switch.
Claim 5
Dependent Claim 173 words
A circuit arrangement as claimed in claim 3, wherein said first means comprises: (a) a first comparator responsive to the voltage from said switch and to a first reference voltage; (b) a second comparator responsive to the output voltage of said voltage regulator and to a second reference voltage; (c) a charging circuit having a given time constant, and being formed by a resistor and a capacitor which is arranged to be charged by an electrical current from said battery; (d) first and second semiconductor switching circuits respectively responsive to the output levels of said first and second comparators, said first and second switching circuits being connected to said charging circuit to discharge the charge of said capacitor when closed; (e) a third comparator responsive to a voltage across said capacitor of said charging circuit and to a third reference voltage; and (f) an OR gate responsive to the output level of said first comparator and to the output level of said third comparator for producing said output signal of said first means.
Claim 6
Dependent Claim 30 words
A circuit arrangement as claimed in claim 4, further comprising first and second voltage dividers for respectively dividing said voltage of said battery and said voltage from said voltage regulator
Claim 7
Dependent Claim 46 words
a circuit arrangement as claimed in claim 5, wherein said first and second reference voltages and the dividing ratios of said first and second voltage dividers are selected such that the output level of said first comparator turns before the output level of said second comparator.
Claim 8
Dependent Claim 31 words
A circuit arrangement as claimed in claim 4, wherein each of said first and second semiconductor switching circuits comprises a transistor and a resistor connected to the base of said transistor.
Claim 9
Dependent Claim 28 words
A circuit arrangement as claimed in claim 4, further comprising a buffer circuit interposed between the output terminal of said first comparator and said first semiconductor switching circuit.
Claim 10
Dependent Claim 23 words
A circuit arrangement as claimed in claim 3, further comprising a capacitor connected between the output terminal of said voltage regulator and ground.
Claim 11
Dependent Claim 23 words
A circuit arrangement as claimed in claim 1, futher comprising a second voltage regulator for regulating the voltage directly applied from said battery.
Claim 12
Dependent Claim 24 words
A circuit arrangement as claimed in claim 10, wherein said second voltage regulator is also responsive to the battery voltage applied via said switch.
Claim 13
Dependent Claim 26 words
A circuit arrangement as claimed in claim 10 or 11, wherein said first and second means are supplied with electrical power from said second voltage regulator.
Claim 14
Dependent Claim 20 words
A circuit arrangement as claimed in claim 1, wherein said switch is controlled by an ignition key of said vehicle.
Claim 15
Dependent Claim 20 words
A circuit arrangement as claimed in claim 1, wherein said switch is interlocked with an ignition key of said vehicle.

References Cited (Backward Citations)

US4016408A Cited
JPS535935A Cited
JPS5363936A Cited
JPS5451334A Cited
US4255789A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-07-17 1988-01-16 1988-07-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-07-17 1992-01-16 1992-07-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-07-17 1996-01-16 1996-07-17 $7700.00 Window Closed / Lapsed

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